sb/intel/i82801dx: Drop GNVS in SMM
The table in CBMEM was never allocated with i82801dx. Change-Id: I4ad97f6504e0f1b22d16210b7dbf5164852cb232 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42851 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
Patrick Georgi
parent
094639c214
commit
f4617c0ce8
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@ -1,105 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOUTHBRIDGE_INTEL_I82801DX_NVS_H
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#define SOUTHBRIDGE_INTEL_I82801DX_NVS_H
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#include <stdint.h>
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struct __packed global_nvs {
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/* Miscellaneous */
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u16 osys; /* 0x00 - Operating System */
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u8 smif; /* 0x02 - SMI function call ("TRAP") */
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u8 prm0; /* 0x03 - SMI function call parameter */
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u8 prm1; /* 0x04 - SMI function call parameter */
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u8 scif; /* 0x05 - SCI function call (via _L00) */
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u8 prm2; /* 0x06 - SCI function call parameter */
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u8 prm3; /* 0x07 - SCI function call parameter */
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u8 lckf; /* 0x08 - Global Lock function for EC */
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u8 prm4; /* 0x09 - Lock function parameter */
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u8 prm5; /* 0x0a - Lock function parameter */
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u32 p80d; /* 0x0b - Debug port (IO 0x80) value */
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u8 lids; /* 0x0f - LID state (open = 1) */
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u8 pwrs; /* 0x10 - Power state (AC = 1) */
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u8 dbgs; /* 0x11 - Debug state */
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u8 linx; /* 0x12 - Linux OS */
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u8 dckn; /* 0x13 - PCIe docking state */
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/* Thermal policy */
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u8 actt; /* 0x14 - active trip point */
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u8 psvt; /* 0x15 - passive trip point */
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u8 tc1v; /* 0x16 - passive trip point TC1 */
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u8 tc2v; /* 0x17 - passive trip point TC2 */
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u8 tspv; /* 0x18 - passive trip point TSP */
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u8 crtt; /* 0x19 - critical trip point */
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u8 dtse; /* 0x1a - Digital Thermal Sensor enable */
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u8 dts1; /* 0x1b - DT sensor 1 */
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u8 dts2; /* 0x1c - DT sensor 2 */
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u8 rsvd2;
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/* Battery Support */
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u8 bnum; /* 0x1e - number of batteries */
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u8 b0sc, b1sc, b2sc; /* 0x1f-0x21 - stored capacity */
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u8 b0ss, b1ss, b2ss; /* 0x22-0x24 - stored status */
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u8 rsvd3[3];
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/* Processor Identification */
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u8 apic; /* 0x28 - APIC enabled */
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u8 mpen; /* 0x29 - MP capable/enabled */
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u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */
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u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */
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u8 ppcm; /* 0x2c - Max. PPC state */
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u8 rsvd4[5];
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/* Super I/O & CMOS config */
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u8 natp; /* 0x32 - SIO type */
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u8 cmap; /* 0x33 - */
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u8 cmbp; /* 0x34 - */
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u8 lptp; /* 0x35 - LPT port */
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u8 fdcp; /* 0x36 - Floppy Disk Controller */
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u8 rfdv; /* 0x37 - */
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u8 hotk; /* 0x38 - Hot Key */
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u8 rtcf;
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u8 util;
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u8 acin;
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/* Integrated Graphics Device */
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u8 igds; /* 0x3c - IGD state */
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u8 tlst; /* 0x3d - Display Toggle List Pointer */
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u8 cadl; /* 0x3e - currently attached devices */
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u8 padl; /* 0x3f - previously attached devices */
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u16 rsvd14[3];
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u8 ndid; /* 0x46 - number of device ids */
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u32 did[5]; /* 0x47 - 5b device id 1..5 */
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u8 rsvd5[0x9];
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/* Backlight Control */
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u8 blcs; /* 0x64 - Backlight Control possible */
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u8 brtl;
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u8 odds;
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u8 rsvd6[0x7];
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/* Ambient Light Sensors*/
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u8 alse; /* 0x6e - ALS enable */
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u8 alaf;
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u8 llow;
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u8 lhih;
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u8 rsvd7[0x6];
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/* EMA */
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u8 emae; /* 0x78 - EMA enable */
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u16 emap;
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u16 emal;
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u8 rsvd8[0x5];
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/* MEF */
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u8 mefe; /* 0x82 - MEF enable */
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u8 rsvd9[0x9];
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/* TPM support */
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u8 tpmp; /* 0x8c - TPM */
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u8 tpme;
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u8 rsvd10[8];
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/* SATA */
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u8 gtf0[7]; /* 0x96 - GTF task file buffer for port 0 */
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u8 gtf1[7];
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u8 gtf2[7];
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u8 idem;
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u8 idet;
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u8 rsvd11[67];
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/* Mainboard specific */
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u8 dock; /* 0xf0 - Docking Status */
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u8 bten;
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u8 rsvd13[14];
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};
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#endif /* SOUTHBRIDGE_INTEL_I82801DX_NVS_H */
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@ -19,8 +19,6 @@
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#define G_SMRANE (1 << 3)
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#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
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#include "nvs.h"
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/* While we read PMBASE dynamically in case it changed, let's
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* initialize it with a sane value
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*/
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@ -30,13 +28,6 @@ unsigned char *mbi = NULL;
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u32 mbi_len;
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u8 mbi_initialized = 0;
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/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located
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* by coreboot.
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*/
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struct global_nvs *gnvs = (struct global_nvs *)0x0;
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void *tcg = (void *)0x0;
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void *smi1 = (void *)0x0;
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/**
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* @brief read and clear PM1_STS
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* @return PM1_STS register
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@ -188,23 +179,6 @@ static void dump_tco_status(u32 tco_sts)
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printk(BIOS_DEBUG, "\n");
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}
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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/**
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* @brief Set the EOS bit
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*/
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@ -482,62 +456,6 @@ static void southbridge_smi_periodic(void)
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printk(BIOS_DEBUG, "Periodic SMI.\n");
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}
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static void southbridge_smi_monitor(void)
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{
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#define IOTRAP(x) (trap_sts & (1 << x))
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#if 0
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u32 trap_sts, trap_cycle;
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u32 data, mask = 0;
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int i;
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trap_sts = RCBA32(0x1e00); // TRSR - Trap Status Register
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RCBA32(0x1e00) = trap_sts; // Clear trap(s) in TRSR
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trap_cycle = RCBA32(0x1e10);
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for (i=16; i<20; i++) {
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if (trap_cycle & (1 << i))
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mask |= (0xff << ((i - 16) << 2));
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}
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/* IOTRAP(3) SMI function call */
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if (IOTRAP(3)) {
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if (gnvs && gnvs->smif)
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io_trap_handler(gnvs->smif); // call function smif
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return;
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}
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/* IOTRAP(2) currently unused
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* IOTRAP(1) currently unused */
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/* IOTRAP(0) SMIC */
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if (IOTRAP(0)) {
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if (!(trap_cycle & (1 << 24))) { // It's a write
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printk(BIOS_DEBUG, "SMI1 command\n");
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data = RCBA32(0x1e18);
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data &= mask;
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// if (smi1)
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// southbridge_smi_command(data);
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// return;
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}
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// Fall through to debug
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}
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printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc);
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for (i=0; i < 4; i++) if (IOTRAP(i)) printk(BIOS_DEBUG, " TRAP = %d\n", i);
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printk(BIOS_DEBUG, " AHBE = %x\n", (trap_cycle >> 16) & 0xf);
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printk(BIOS_DEBUG, " MASK = 0x%08x\n", mask);
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printk(BIOS_DEBUG, " read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write");
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if (!(trap_cycle & (1 << 24))) {
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/* Write Cycle */
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data = RCBA32(0x1e18);
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printk(BIOS_DEBUG, " iotrap written data = 0x%08x\n", data);
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}
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#endif
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#undef IOTRAP
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}
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typedef void (*smi_handler_t)(void);
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smi_handler_t southbridge_smi[32] = {
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@ -562,7 +480,7 @@ smi_handler_t southbridge_smi[32] = {
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NULL, // [18] INTEL_USB2_STS
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NULL, // [19] reserved
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NULL, // [20] PCI_EXP_SMI_STS
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southbridge_smi_monitor, // [21] MONITOR_STS
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NULL, // [21] MONITOR_STS
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NULL, // [22] reserved
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NULL, // [23] reserved
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NULL, // [24] reserved
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