mb/google/brya: Create craask variant

Create the craask variant of the brya0 reference board by copying
the template files to a new directory named for the variant.

(Auto-Generated by create_coreboot_variant.sh version 4.5.0.)

BUG=b:None
BRANCH=None
TEST=util/abuild/abuild -p none -t google/brya -x -a
make sure the build includes GOOGLE_CRAASK

Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: Icf03e3f18468d7dd207ab200fa2dcf96afd02f8b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Tyler Wang 2022-03-31 13:57:17 +08:00 committed by Felix Held
parent 581cd6762f
commit f478b1f464
8 changed files with 47 additions and 1 deletions

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@ -118,6 +118,7 @@ config DRIVER_TPM_I2C_BUS
default 0x1 if BOARD_GOOGLE_VOLMAR default 0x1 if BOARD_GOOGLE_VOLMAR
default 0x1 if BOARD_GOOGLE_BANSHEE default 0x1 if BOARD_GOOGLE_BANSHEE
default 0x1 if BOARD_GOOGLE_KINOX default 0x1 if BOARD_GOOGLE_KINOX
default 0x0 if BOARD_GOOGLE_CRAASK
config DRIVER_TPM_I2C_ADDR config DRIVER_TPM_I2C_ADDR
hex hex
@ -170,6 +171,7 @@ config MAINBOARD_PART_NUMBER
default "Crota" if BOARD_GOOGLE_CROTA default "Crota" if BOARD_GOOGLE_CROTA
default "Moli" if BOARD_GOOGLE_MOLI default "Moli" if BOARD_GOOGLE_MOLI
default "Kinox" if BOARD_GOOGLE_KINOX default "Kinox" if BOARD_GOOGLE_KINOX
default "Craask" if BOARD_GOOGLE_CRAASK
config VARIANT_DIR config VARIANT_DIR
default "brya0" if BOARD_GOOGLE_BRYA0 default "brya0" if BOARD_GOOGLE_BRYA0
@ -197,6 +199,7 @@ config VARIANT_DIR
default "crota" if BOARD_GOOGLE_CROTA default "crota" if BOARD_GOOGLE_CROTA
default "moli" if BOARD_GOOGLE_MOLI default "moli" if BOARD_GOOGLE_MOLI
default "kinox" if BOARD_GOOGLE_KINOX default "kinox" if BOARD_GOOGLE_KINOX
default "craask" if BOARD_GOOGLE_CRAASK
config VBOOT config VBOOT
select VBOOT_EARLY_EC_SYNC select VBOOT_EARLY_EC_SYNC
@ -227,7 +230,7 @@ config USE_PM_ACPI_TIMER
choice choice
prompt "Cache as RAM (CAR) setup configuration to use" prompt "Cache as RAM (CAR) setup configuration to use"
default USE_ADL_NEM if BOARD_GOOGLE_BRYA4ES || BOARD_GOOGLE_PRIMUS4ES || BOARD_GOOGLE_GIMBLE4ES || BOARD_GOOGLE_REDRIX4ES || BOARD_GOOGLE_TAEKO4ES || BOARD_GOOGLE_ANAHERA4ES || BOARD_GOOGLE_TANIKS || BOARD_GOOGLE_NIVVIKS || BOARD_GOOGLE_NEREID default USE_ADL_NEM if BOARD_GOOGLE_BRYA4ES || BOARD_GOOGLE_PRIMUS4ES || BOARD_GOOGLE_GIMBLE4ES || BOARD_GOOGLE_REDRIX4ES || BOARD_GOOGLE_TAEKO4ES || BOARD_GOOGLE_ANAHERA4ES || BOARD_GOOGLE_TANIKS || BOARD_GOOGLE_NIVVIKS || BOARD_GOOGLE_NEREID || BOARD_GOOGLE_CRAASK
default USE_ADL_ENEM default USE_ADL_ENEM
config USE_ADL_ENEM config USE_ADL_ENEM

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@ -192,3 +192,7 @@ config BOARD_GOOGLE_MOLI
config BOARD_GOOGLE_KINOX config BOARD_GOOGLE_KINOX
bool "-> Kinox" bool "-> Kinox"
select BOARD_GOOGLE_BASEBOARD_BRASK select BOARD_GOOGLE_BASEBOARD_BRASK
config BOARD_GOOGLE_CRAASK
bool "-> Craask"
select BOARD_GOOGLE_BASEBOARD_NISSA

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef __VARIANT_EC_H__
#define __VARIANT_EC_H__
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef VARIANT_GPIO_H
#define VARIANT_GPIO_H
#include <baseboard/gpio.h>
#endif

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@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
SPD_SOURCES = placeholder

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@ -0,0 +1 @@
DRAM Part Name ID to assign

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@ -0,0 +1,11 @@
# This is a CSV file containing a list of memory parts used by this variant.
# One part per line with an optional fixed ID in column 2.
# Only include a fixed ID if it is required for legacy reasons!
# Generated IDs are dependent on the order of parts in this file,
# so new parts must always be added at the end of the file!
#
# Generate an updated Makefile.inc and dram_id.generated.txt by running the
# part_id_gen tool from util/spd_tools.
# See util/spd_tools/README.md for more details and instructions.
# Part Name

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@ -0,0 +1,6 @@
chip soc/intel/alderlake
device domain 0 on
end
end