From f4ba356420790f463f39de10ec71f9a50c5eac12 Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Thu, 5 May 2022 14:34:56 +0800 Subject: [PATCH] mb/google/kukui: Add LPDDR4X MT53E2G32D4NQ-046 WT:C support Separate and add LPDDR4X MT53E2G32D4NQ-046 WT:C support for burnet/esche ID#1: MICRON - MT53E2G32D4NQ-046 WT:C BUG=b:225121354 BRANCH=none TEST=1. emerge-jacuzzi coreboot 2. power on test ok Change-Id: If720d7bcf185c5c0149a82125ec068fc75e5b3cd Signed-off-by: Kevin Chiu Reviewed-on: https://review.coreboot.org/c/coreboot/+/64069 Reviewed-by: Chen-Tsung Hsieh Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/mainboard/google/kukui/Kconfig | 3 ++- src/mainboard/google/kukui/sdram_configs.c | 16 +++++++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig index 45682494ff..86dd8f93f5 100644 --- a/src/mainboard/google/kukui/Kconfig +++ b/src/mainboard/google/kukui/Kconfig @@ -90,10 +90,11 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS config BOARD_SDRAM_TABLE_OFFSET hex - default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE || BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA + default 0x10 if BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU default 0x30 if BOARD_GOOGLE_COZMO || BOARD_GOOGLE_PICO default 0x40 if BOARD_GOOGLE_KAPPA + default 0x50 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE default 0x0 config BOARD_OVERRIDE_LCM_ID diff --git a/src/mainboard/google/kukui/sdram_configs.c b/src/mainboard/google/kukui/sdram_configs.c index 283cf66519..59387850e5 100644 --- a/src/mainboard/google/kukui/sdram_configs.c +++ b/src/mainboard/google/kukui/sdram_configs.c @@ -25,7 +25,7 @@ static const char *const sdram_configs[] = { [0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", [0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB", - /* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */ + /* Table shared by Fennel, Cerise, Stern, Makomo, Munna, offset = 0x10 */ [0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB", [0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB", [0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB", @@ -72,6 +72,20 @@ static const char *const sdram_configs[] = { [0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB", [0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", [0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB", + + /* Table shared by Burnet and Esche, offset = 0x50 */ + [0x50] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB", + [0x51] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB", + [0x52] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB", + [0x53] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB", + [0x54] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", + [0x55] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB", + [0x56] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB", + [0x57] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB", + [0x58] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB", + [0x59] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB", + [0x5a] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB", + [0x5b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB", }; static struct sdram_params params;