mb/google/kukui: Add LPDDR4X MT53E2G32D4NQ-046 WT:C support

Separate and add LPDDR4X MT53E2G32D4NQ-046 WT:C support for burnet/esche
ID#1: MICRON - MT53E2G32D4NQ-046 WT:C

BUG=b:225121354
BRANCH=none
TEST=1. emerge-jacuzzi coreboot
     2. power on test ok

Change-Id: If720d7bcf185c5c0149a82125ec068fc75e5b3cd
Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64069
Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kevin Chiu 2022-05-05 14:34:56 +08:00 committed by Felix Held
parent fefd000431
commit f4ba356420
2 changed files with 17 additions and 2 deletions

View File

@ -90,10 +90,11 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
config BOARD_SDRAM_TABLE_OFFSET config BOARD_SDRAM_TABLE_OFFSET
hex hex
default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE || BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA default 0x10 if BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA
default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU
default 0x30 if BOARD_GOOGLE_COZMO || BOARD_GOOGLE_PICO default 0x30 if BOARD_GOOGLE_COZMO || BOARD_GOOGLE_PICO
default 0x40 if BOARD_GOOGLE_KAPPA default 0x40 if BOARD_GOOGLE_KAPPA
default 0x50 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE
default 0x0 default 0x0
config BOARD_OVERRIDE_LCM_ID config BOARD_OVERRIDE_LCM_ID

View File

@ -25,7 +25,7 @@ static const char *const sdram_configs[] = {
[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", [0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
[0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB", [0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
/* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */ /* Table shared by Fennel, Cerise, Stern, Makomo, Munna, offset = 0x10 */
[0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB", [0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
[0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB", [0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB", [0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
@ -72,6 +72,20 @@ static const char *const sdram_configs[] = {
[0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB", [0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", [0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
[0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB", [0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
/* Table shared by Burnet and Esche, offset = 0x50 */
[0x50] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
[0x51] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x52] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x53] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x54] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
[0x55] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
[0x56] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x57] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB",
[0x58] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[0x59] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[0x5a] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x5b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
}; };
static struct sdram_params params; static struct sdram_params params;