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Revert "pistashio: bump up romstage size" 

This reverts commit 701211a6e57a17ea861b4ad682dca7416fc9050e.

Change-Id: Ib3e573548bff5c17ab30cfab3d833a2065d689c9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10222
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Aaron Durbin 2015-05-15 16:56:27 -05:00 committed by Patrick Georgi
parent 899d13d0df
commit f4e859b11c
1 changed files with 2 additions and 2 deletions
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4
src/soc/imgtec/pistachio/include/soc/memlayout.ld
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@ -38,8 +38,8 @@ SECTIONS
* and then through the identity mapping in ROM stage.
*/
SRAM_START(0x1a000000)
ROMSTAGE(0x1a005000, 40K)
PRERAM_CBFS_CACHE(0x1a00f000, 68K)
ROMSTAGE(0x1a005000, 36K)
PRERAM_CBFS_CACHE(0x1a00e000, 72K)
SRAM_END(0x1a020000)
/* Bootblock executes out of KSEG0 and sets up the identity mapping.