GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

baytrail: lpe audio device needs memory for its firmware 

The LPE audio device needs 1MiB of memory for its firmware.
It also has a requirement that the memory needs to be on a
512MiB boundary. Just take 1MiB @ 512MiB for the LPE device.

BUG=chrome-os-partner:23791
BRANCH=None
TEST=Built and analyzed console logs for resources. Also interrogated
     registres within the kernel.

Change-Id: I4d9ad5c7b5a2f3eb627b30528d738289278b3a7b
Reviewed-on: https://chromium-review.googlesource.com/179192
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4994
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Aaron Durbin 2013-12-09 12:52:37 -06:00 committed by Kyösti Mälkki
parent c087a9e469
commit f4fe3c303c
1 changed files with 33 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
src/soc/intel/baytrail/lpe.c
View File

@ -30,6 +30,13 @@
#include "chip.h" #include "chip.h"
/* The LPE audio devices needs 1MiB of memory reserved aligned to a 512MiB
* address. Just take 1MiB @ 512MiB. */
#define FIRMWARE_PHYS_BASE (512 << 20)
#define FIRMWARE_PHYS_LENGTH (1 << 20)
#define FIRMWARE_REG_BASE 0xa8
#define FIRMWARE_REG_LENGTH 0xac
static void setup_codec_clock(device_t dev) static void setup_codec_clock(device_t dev)
{ {
uint32_t reg; uint32_t reg;
@ -73,9 +80,33 @@ static void lpe_init(device_t dev)
setup_codec_clock(dev); setup_codec_clock(dev);
} }
static void lpe_read_resources(device_t dev)
{
pci_dev_read_resources(dev);
reserved_ram_resource(dev, FIRMWARE_REG_BASE,
FIRMWARE_PHYS_BASE >> 10,
FIRMWARE_PHYS_LENGTH >> 10);
}
static void lpe_set_resources(device_t dev)
{
struct resource *res;
pci_dev_set_resources(dev);
res = find_resource(dev, FIRMWARE_REG_BASE);
if (res == NULL) {
printk(BIOS_DEBUG, "LPE Firmware memory not found.\n");
return;
}
pci_write_config32(dev, FIRMWARE_REG_BASE, res->base);
pci_write_config32(dev, FIRMWARE_REG_LENGTH, res->size);
}
static const struct device_operations device_ops = { static const struct device_operations device_ops = {
.read_resources = pci_dev_read_resources, .read_resources = lpe_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = lpe_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
.init = lpe_init, .init = lpe_init,
.enable = NULL, .enable = NULL,