soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
This patch creates a glue layer between SOC and common block IPs in terms of PCH. All common IP blocks now can be selected based on SOC_INTEL_COMMON_PCH_BASE config option. BUG=none BRANCH=b:78109109 TEST=Build and boot Cannonlake RVP and EVE. Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85d99 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -48,32 +48,11 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_ACPI
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select SOC_INTEL_COMMON_BLOCK_ACPI
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CSE
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select SOC_INTEL_COMMON_BLOCK_DSP
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select SOC_INTEL_COMMON_BLOCK_EBDA
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select SOC_INTEL_COMMON_BLOCK_FAST_SPI
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select SOC_INTEL_COMMON_BLOCK_GPIO
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select SOC_INTEL_COMMON_BLOCK_GRAPHICS
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_ITSS
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select SOC_INTEL_COMMON_BLOCK_I2C
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select SOC_INTEL_COMMON_BLOCK_LPC
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select SOC_INTEL_COMMON_BLOCK_LPSS
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select SOC_INTEL_COMMON_BLOCK_P2SB
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select SOC_INTEL_COMMON_BLOCK_PCR
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select SOC_INTEL_COMMON_BLOCK_PMC
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select SOC_INTEL_COMMON_BLOCK_RTC
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SATA
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select SOC_INTEL_COMMON_BLOCK_SCS
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select SOC_INTEL_COMMON_BLOCK_SMBUS
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_SPI
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select SOC_INTEL_COMMON_PCH_BASE
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select SOC_INTEL_COMMON_BLOCK_TIMER
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select SOC_INTEL_COMMON_BLOCK_UART
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select SOC_INTEL_COMMON_BLOCK_XDCI
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select SOC_INTEL_COMMON_BLOCK_XHCI
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select SOC_INTEL_COMMON_NHLT
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select SOC_INTEL_COMMON_NHLT
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select SOC_INTEL_COMMON_RESET
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select SOC_INTEL_COMMON_RESET
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select SSE2
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select SSE2
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@ -58,37 +58,15 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK
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select SOC_INTEL_COMMON_BLOCK
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CSE
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select SOC_INTEL_COMMON_BLOCK_DSP
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select SOC_INTEL_COMMON_BLOCK_EBDA
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select SOC_INTEL_COMMON_BLOCK_FAST_SPI
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select SOC_INTEL_COMMON_BLOCK_GPIO
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select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
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select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
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select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
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select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
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select SOC_INTEL_COMMON_BLOCK_GRAPHICS
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select SOC_INTEL_COMMON_BLOCK_GSPI
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select SOC_INTEL_COMMON_BLOCK_GSPI
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select SOC_INTEL_COMMON_BLOCK_I2C
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select SOC_INTEL_COMMON_BLOCK_ITSS
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select SOC_INTEL_COMMON_BLOCK_LPC
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select SOC_INTEL_COMMON_BLOCK_LPSS
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select SOC_INTEL_COMMON_BLOCK_P2SB
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select SOC_INTEL_COMMON_BLOCK_PCIE
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select SOC_INTEL_COMMON_BLOCK_PCR
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select SOC_INTEL_COMMON_BLOCK_PMC
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select SOC_INTEL_COMMON_BLOCK_RTC
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SATA
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select SOC_INTEL_COMMON_BLOCK_SCS
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select SOC_INTEL_COMMON_BLOCK_SGX
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select SOC_INTEL_COMMON_BLOCK_SGX
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select SOC_INTEL_COMMON_BLOCK_SMBUS
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_SPI
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select SOC_INTEL_COMMON_BLOCK_TIMER
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select SOC_INTEL_COMMON_BLOCK_UART
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select SOC_INTEL_COMMON_BLOCK_VMX
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select SOC_INTEL_COMMON_BLOCK_VMX
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select SOC_INTEL_COMMON_BLOCK_XDCI
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select SOC_INTEL_COMMON_PCH_BASE
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select SOC_INTEL_COMMON_BLOCK_XHCI
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select SOC_INTEL_COMMON_NHLT
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select SOC_INTEL_COMMON_NHLT
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select SOC_INTEL_COMMON_RESET
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select SOC_INTEL_COMMON_RESET
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select SSE2
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select SSE2
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