pci: Fix MMCONF_SUPPORT on non x86

Move x86 specific pci_bus_default_ops into arch/x86 folder.
Fixes compilation on platforms that do neither have MMCONF_SUPPORT
nor NO_MMCONF_SUPPORT (for example: all non-x86) but select PCI.

Change-Id: I0991ab00c9a56b23cd012dd2b8b861f9737a9e9c
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Patrick Rudolph 2018-04-18 10:31:19 +02:00 committed by Patrick Rudolph
parent 8cfd76d44e
commit f5180a957a
5 changed files with 32 additions and 7 deletions

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@ -341,6 +341,7 @@ ramstage-y += memset.c
ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
ramstage-y += pci_ops_conf1.c
ramstage-y += pci_ops.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
ramstage-y += rdrand.c

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@ -19,8 +19,6 @@
extern const struct pci_bus_operations pci_cf8_conf1;
extern const struct pci_bus_operations pci_ops_mmconf;
const struct pci_bus_operations *pci_bus_default_ops(device_t dev);
#endif
#endif /* ARCH_I386_PCI_OPS_H */

25
src/arch/x86/pci_ops.c Normal file
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@ -0,0 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Facebook, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pci_ops.h>
const struct pci_bus_operations *pci_bus_default_ops(struct device *dev)
{
if (IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
return &pci_cf8_conf1;
return &pci_ops_mmconf;
}

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@ -20,12 +20,11 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
const struct pci_bus_operations *pci_bus_default_ops(device_t dev)
/* Overwrite with architecture specific method */
const struct pci_bus_operations __attribute__((weak))
*pci_bus_default_ops(struct device *dev)
{
if (IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
return &pci_cf8_conf1;
return &pci_ops_mmconf;
return NULL;
}
static const struct pci_bus_operations *pci_bus_ops(struct bus *bus, struct device *dev)

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@ -73,4 +73,6 @@ void pci_update_config32(device_t dev, int reg, u32 mask, u32 or)
pci_write_config32(dev, reg, reg32);
}
const struct pci_bus_operations *pci_bus_default_ops(struct device *dev);
#endif /* PCI_OPS_H */