mb/google/brya: Add support for romstage GPIO table

Some variants may require more complex power sequencing than can be
accomodated with just 2 GPIO tables, therefore introduce one in romstage
as well.

BUG=b:187691798

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I7a63a2ee2cd036b9ae5822be9c87d8a026a54922
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>

src/mainboard/google/brya/romstage_spd_cbfs.c

@@ -10,11 +10,15 @@ void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
 {
 	const struct mb_cfg *mem_config = variant_memory_params();
 	bool half_populated = variant_is_half_populated();
-
 	const struct mem_spd spd_info = {
 		.topo = MEM_TOPO_MEMORY_DOWN,
 		.cbfs_index = variant_memory_sku(),
 	};
+	const struct pad_config *pads;
+	size_t pads_num;
 
 	memcfg_init(m_cfg, mem_config, &spd_info, half_populated);
+
+	pads = variant_romstage_gpio_table(&pads_num);
+	gpio_configure_pads(pads, pads_num);
 }

src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc

@@ -1,3 +1,5 @@
 bootblock-y += gpio.c
 
+romstage-y += gpio.c
+
 ramstage-y += gpio.c

src/mainboard/google/brya/variants/baseboard/brask/gpio.c

@@ -422,3 +422,9 @@ const struct cros_gpio *__weak variant_cros_gpios(size_t *num)
 	*num = ARRAY_SIZE(cros_gpios);
 	return cros_gpios;
 }
+
+const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
+{
+	*num = 0;
+	return NULL;
+}

src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc

@@ -1,6 +1,7 @@
 bootblock-y += gpio.c
 
 romstage-y += memory.c
+romstage-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += ramstage.c

src/mainboard/google/brya/variants/baseboard/brya/gpio.c

@@ -444,3 +444,9 @@ const struct cros_gpio *__weak variant_cros_gpios(size_t *num)
 	*num = ARRAY_SIZE(cros_gpios);
 	return cros_gpios;
 }
+
+const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
+{
+	*num = 0;
+	return NULL;
+}

src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h

@@ -16,6 +16,7 @@ const struct pad_config *variant_gpio_table(size_t *num);
 const struct pad_config *variant_gpio_override_table(size_t *num);
 const struct pad_config *variant_early_gpio_table(size_t *num);
 const struct cros_gpio *variant_cros_gpios(size_t *num);
+const struct pad_config *variant_romstage_gpio_table(size_t *num);
 
 const struct mb_cfg *variant_memory_params(void);
 int variant_memory_sku(void);
@@ -37,6 +38,6 @@ struct cpu_power_limits {
 
 /* Modify Power Limit devictree settings during ramstage */
 void variant_update_power_limits(const struct cpu_power_limits *limits,
-									size_t num_entries);
+				 size_t num_entries);
 
 #endif /*__BASEBOARD_VARIANTS_H__ */

src/mainboard/google/brya/variants/brya0/Makefile.inc

@@ -1,4 +1,5 @@
 bootblock-y += gpio.c
+romstage-y += gpio.c
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-y += gpio.c