soc/amd/common: move GPIO ACPIMMIO access functions to gpio_banks block
Since the raw GPIO MMIO register access is now only used inside the gpio_banks block, the gpio_read32 and gpio_write32 functions can be moved to that block to reduce the visibility and enforce the usage of the functions provided by the gpio_banks block. The iomux_read8 and iomux_write8 functions can't be easily moved to the gpio_banks block, since it's also used in the pre-SOC AMD chipsets that use the ACPIMMIO access functions directly. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia0d6dea72c6bebbbe6ce545bedfc74f91e0042c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
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@ -15,6 +15,22 @@
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#include <assert.h>
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#include <string.h>
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/* MMIO access of new-style GPIO bank configuration registers */
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static inline void *gpio_ctrl_ptr(uint8_t gpio_num)
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{
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return acpimmio_gpio0 + gpio_num * sizeof(uint32_t);
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}
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static inline uint32_t gpio_read32(uint8_t gpio_num)
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{
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return read32(gpio_ctrl_ptr(gpio_num));
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}
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static inline void gpio_write32(uint8_t gpio_num, uint32_t value)
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{
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write32(gpio_ctrl_ptr(gpio_num), value);
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}
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static int get_gpio_gevent(gpio_t gpio, const struct soc_amd_event *table,
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size_t items)
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{
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@ -325,23 +325,6 @@ static inline void gpio_100_write8(uint8_t reg, uint8_t value)
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write8(acpimmio_gpio_100 + reg, value);
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}
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/* New GPIO banks configuration registers */
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static inline void *gpio_ctrl_ptr(uint8_t gpio_num)
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{
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return acpimmio_gpio0 + gpio_num * sizeof(uint32_t);
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}
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static inline uint32_t gpio_read32(uint8_t gpio_num)
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{
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return read32(gpio_ctrl_ptr(gpio_num));
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}
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static inline void gpio_write32(uint8_t gpio_num, uint32_t value)
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{
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write32(gpio_ctrl_ptr(gpio_num), value);
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}
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static inline uint8_t xhci_pm_read8(uint8_t reg)
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{
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return read8(acpimmio_xhci_pm + reg);
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