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bd82x6x/early_pch: enable smbus in bootblock stage 

SMBus is typically enabled in the ROMSTAGE. To get the
BOOTBLOCK console message, the SMBus should be enabled
in the BOOTBLOCK stage.

Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4
Signed-off-by: Husni Faiz <ahamedhusni73@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67340
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Husni Faiz 2022-09-05 15:28:53 +05:30 committed by Martin L Roth
parent 67300f88cd
commit f571ce5c67
2 changed files with 8 additions and 1 deletions
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2
src/southbridge/intel/bd82x6x/early_pch.c
View File

@ -310,6 +310,6 @@ void early_pch_init(void)
setup_pch_gpios(&mainboard_gpio_map); setup_pch_gpios(&mainboard_gpio_map);
if (ENV_RAMINIT) if (ENV_RAMINIT || (CONFIG(CONSOLE_I2C_SMBUS) && ENV_INITIAL_STAGE))
enable_smbus(); enable_smbus();
} }

7
src/southbridge/intel/common/Makefile.inc
View File

@ -9,10 +9,17 @@ all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET) += hpet.c
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME) += me.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME) += me.c
ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c
endif
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c
ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
else
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
endif
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus_ops.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus_ops.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c