AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS

S3_DATA_POS defines address where the whole S3 data is stored.

Change-Id: I4155a0821e74a3653caaead890e5fec5677637aa
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/2438
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Zheng Bao 2013-02-17 17:01:34 +08:00 committed by Marc Jones
parent 832452a7ea
commit f57d0dce95
6 changed files with 9 additions and 9 deletions

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@ -24,9 +24,9 @@
#define S3_DATA_VOLATILE_SIZE 0x6000
#define S3_DATA_MTRR_SIZE 0x1000
#define S3_DATA_NONVOLATILE_SIZE 0x1000
#define S3_DATA_VOLATILE_POS CONFIG_S3_VOLATILE_POS
#define S3_DATA_MTRR_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
#define S3_DATA_VOLATILE_POS CONFIG_S3_DATA_POS
#define S3_DATA_MTRR_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
typedef enum {
S3DataTypeNonVolatile=0, ///< NonVolatile Data Type

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@ -20,14 +20,14 @@ ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
ifeq ($(CONFIG_CPU_AMD_AGESA), y)
$(obj)/coreboot_s3nv.rom: $(obj)/config.h
echo " S3 NVRAM $(CONFIG_S3_VOLATILE_POS) (S3 storage area)"
echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)"
# force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp
mv $@.tmp $@
cbfs-files-y += s3nv
s3nv-file := $(obj)/coreboot_s3nv.rom
s3nv-position := $(CONFIG_S3_VOLATILE_POS)
s3nv-position := $(CONFIG_S3_DATA_POS)
s3nv-type := raw
endif # CONFIG_CPU_AMD_AGESA == y

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@ -204,7 +204,7 @@ config RAID_MISC_ROM_POSITION
The CONFIG_ROM_SIZE must larger than 0x100000.
endif # HUDSON_SATA_RAID
config S3_VOLATILE_POS
config S3_DATA_POS
hex "S3 volatile storage position"
default 0xFFFF0000
depends on HAVE_ACPI_RESUME

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@ -60,7 +60,7 @@ config REDIRECT_SBCIMX_TRACE_TO_SERIAL
Warning: Only enable this option when debuging or tracing AMD CIMX code.
config S3_VOLATILE_POS
config S3_DATA_POS
hex "S3 volatile storage position"
default 0xFFFF0000
depends on HAVE_ACPI_RESUME

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@ -122,7 +122,7 @@ config RAID_MISC_ROM_POSITION
endif
config S3_VOLATILE_POS
config S3_DATA_POS
hex "S3 volatile storage position"
default 0xFFFF0000
depends on HAVE_ACPI_RESUME

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@ -53,7 +53,7 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/amd/cimx/sb900/bootblock.c"
config S3_VOLATILE_POS
config S3_DATA_POS
hex "S3 volatile storage position"
default 0xFFFF0000
depends on HAVE_ACPI_RESUME