asrock/e350m1: Switch away from AGESA_LEGACY_WRAPPER
Change-Id: I6ad99af55975b21b0a7671553246cdb5a1e19091 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/19149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -17,7 +17,6 @@ if BOARD_ASROCK_E350M1
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select AGESA_LEGACY_WRAPPER
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select CPU_AMD_AGESA_FAMILY14
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select NORTHBRIDGE_AMD_AGESA_FAMILY14
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select SOUTHBRIDGE_AMD_CIMX_SB800
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@ -22,7 +22,7 @@
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#include "Filecode.h"
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#include <string.h>
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#include <northbridge/amd/agesa/agesawrapper.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
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@ -42,7 +42,7 @@
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**/
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/*---------------------------------------------------------------------------------------*/
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static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
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void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
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{
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AGESA_STATUS Status;
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VOID *BrazosPcieComplexListPtr;
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@ -120,7 +120,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
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InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
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InitEarly->GnbConfig.PsppPolicy = 0;
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return AGESA_SUCCESS;
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}
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/*----------------------------------------------------------------------------------------
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@ -134,12 +133,13 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
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* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
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* use its default conservative settings.
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*/
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CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
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static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
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NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
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NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1),
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PSO_END
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};
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const struct OEM_HOOK OemCustomize = {
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.InitEarly = OemInitEarly,
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};
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void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
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{
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InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
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}
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