mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices

Since all devicetrees from hp/snb_ivb_desktops are using the reference
names for PCI devices now, remove the equivalent comments documenting
their function.

Change-Id: I42b680f753fb2ed8bc0ae8b5bfb20ee8a7cf8bdb
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80049
Reviewed-by: Riku Viitanen <riku.viitanen@protonmail.com>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2024-01-18 06:09:08 +01:00 committed by Felix Singer
parent 8b036e1484
commit f5bc43f13e
11 changed files with 129 additions and 129 deletions

View File

@ -19,7 +19,7 @@ chip northbridge/intel/sandybridge
device domain 0 on
device ref host_bridge on end # Host bridge
device ref host_bridge on end
chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "pcie_port_coalesce" = "true"
@ -27,24 +27,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R
device ref me_kt off end # Management Engine KT
device ref gbe on end # Intel Gigabit Ethernet
device ref ehci2 on end # USB2 EHCI #2
device ref hda on end # HD Audio controller
device ref ehci1 on end # USB2 EHCI #1
device ref pci_bridge off end # PCI bridge
device ref lpc on # LPC bridge
device ref mei1 on end
device ref mei2 off end
device ref me_ide_r off end
device ref me_kt off end
device ref gbe on end
device ref ehci2 on end
device ref hda on end
device ref ehci1 on end
device ref pci_bridge off end
device ref lpc on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
device ref sata1 on end # SATA Controller 1
device ref smbus on end # SMBus
device ref sata2 off end # SATA Controller 2
device ref thermal off end # Thermal
device ref sata1 on end
device ref smbus on end
device ref sata2 off end
device ref thermal off end
end
end
end

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@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x1815 inherit
device ref peg10 off end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -24,17 +24,17 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref mei1 on end # Management Engine KT
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 off end # PCIe Port #2
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
device ref pcie_rp4 on end # PCIe Port #4, WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref xhci on end
device ref mei1 on end
device ref pcie_rp1 on end
device ref pcie_rp2 off end
device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x162b inherit
device ref peg10 off end # PEG
device ref igd on end # iGPU
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -21,24 +21,24 @@ chip northbridge/intel/sandybridge
# HDD(0), ODD(1), eSATA(4), dock eSATA(5)
register "sata_port_map" = "0x33"
device ref pcie_rp1 off end # PCIe Port #1
device ref pcie_rp2 on # PCIe Port #2, ExpressCard
device ref pcie_rp1 off end
device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC Host Controller
device ref pcie_rp4 on # PCIe Port #4, WLAN
device ref pcie_rp3 on end # SD/MMC Host Controller
device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 on # PCIe Port #7, WWAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 on # WWAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthLong" "Mini PCIe" "SlotDataBusWidth1X"
end
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x17df inherit
device ref peg10 off end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -23,16 +23,16 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
device ref pcie_rp4 on end # PCIe Port #4, WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref xhci on end
device ref pcie_rp1 on end
device ref pcie_rp2 on end # ExpressCard
device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x162a inherit
device ref peg10 off end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -20,15 +20,15 @@ chip northbridge/intel/sandybridge
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
device ref pcie_rp1 on end
device ref pcie_rp2 on end # ExpressCard
device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 on end # PCIe Port #7, WWAN
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 on end # WWAN
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x161c inherit
device ref peg10 on end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 on end # discrete graphics
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -21,16 +21,16 @@ chip northbridge/intel/sandybridge
# HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b"
device ref me_kt on end # Management Engine KT
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
device ref pcie_rp4 on end # PCIe Port #4, WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 on end # PCIe Port #7, WWAN
device ref pcie_rp8 on end # PCIe Port #8, NEC USB 3.0 Host Controller
device ref lpc on # LPC bridge
device ref me_kt on end
device ref pcie_rp1 on end
device ref pcie_rp2 on end # ExpressCard
device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 on end # WWAN
device ref pcie_rp8 on end # NEC USB 3.0 Host Controller
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x179b inherit
device ref peg10 on end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 on end # discrete graphics
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -24,17 +24,17 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref me_kt on end # Management Engine KT
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
device ref pcie_rp4 on end # PCIe Port #4, WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref xhci on end
device ref me_kt on end
device ref pcie_rp1 on end
device ref pcie_rp2 on end # ExpressCard
device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"

View File

@ -5,11 +5,11 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x176c inherit
device ref peg10 on # PCIe Bridge for discrete graphics
device ref peg10 on # discrete graphics
device pci 00.0 on end # GPU
device pci 00.1 on end # HDMI Audio on GPU
end
device ref igd off end # Internal graphics
device ref igd off end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "docking_supported" = "0"
@ -25,16 +25,16 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2
device ref xhci on end
device ref pcie_rp1 on end
device ref pcie_rp2 on end
device ref pcie_rp3 on end # Media Card and FireWire host controller
device ref pcie_rp4 on end # Wireless LAN Adapter
device ref pcie_rp5 on end # SATA Controller 2 for dock
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x18df inherit
device ref peg10 off end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -23,16 +23,16 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 off end # PCIe Port #2
device ref pcie_rp3 on end # PCIe Port #3 SDHCI
device ref pcie_rp4 on end # PCIe Port #4 WLAN
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref xhci on end
device ref pcie_rp1 on end
device ref pcie_rp2 off end
device ref pcie_rp3 on end # SDHCI
device ref pcie_rp4 on end # WLAN
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"

View File

@ -6,8 +6,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x1621 inherit
device ref peg10 off end # PEG
device ref igd on end # iGPU
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x007c0201"
@ -20,20 +20,20 @@ chip northbridge/intel/sandybridge
# FIXME: ports 3, 5 are untested
register "sata_port_map" = "0x3b"
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on # PCIe Port #2, ExpressCard
device ref pcie_rp1 on end
device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
device ref pcie_rp3 on end # PCIe Port #3, SD/MMC and FireWire
device ref pcie_rp4 on # PCIe Port #4, WLAN
device ref pcie_rp3 on end # SD/MMC and FireWire
device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 on end # PCIe Port #7, WWAN
device ref pcie_rp8 off end # PCIe Port #8
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 on end # WWAN
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"

View File

@ -7,8 +7,8 @@ chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x18f8 inherit
device ref peg10 off end # PCIe Bridge for discrete graphics
device ref igd on end # Internal graphics
device ref peg10 off end
device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@ -23,16 +23,16 @@ chip northbridge/intel/sandybridge
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 off end # PCIe Port #2
device ref pcie_rp3 on end # PCIe Port #3
device ref pcie_rp4 on end # PCIe Port #4
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref lpc on # LPC bridge
device ref xhci on end
device ref pcie_rp1 on end
device ref pcie_rp2 off end
device ref pcie_rp3 on end
device ref pcie_rp4 on end
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"