soc/intel: indicate to build system that XIP_ROM_SIZE isn't used
The XIP_ROM_SIZE Kconfig variable isn't used for these chipsets. Therefore, indicate as such so that romstage can be placed in cbfs less rigidly. Change-Id: If5cae10b90e05029df56c282e8adf37fa0102955 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14626 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -23,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_INTEL_FIRMWARE
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select MMCONF_SUPPORT
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select MMCONF_SUPPORT_DEFAULT
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select NO_FIXED_XIP_ROM_SIZE
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select PARALLEL_MP
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_HARD_RESET
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select MMCONF_SUPPORT
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select MMCONF_SUPPORT_DEFAULT
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select NO_FIXED_XIP_ROM_SIZE
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select RELOCATABLE_MODULES
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select RELOCATABLE_RAMSTAGE
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select PARALLEL_MP
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@ -21,6 +21,7 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_HARD_RESET
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select MMCONF_SUPPORT
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select MMCONF_SUPPORT_DEFAULT
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select NO_FIXED_XIP_ROM_SIZE
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select RELOCATABLE_MODULES
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select PARALLEL_MP
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select PCIEXP_ASPM
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@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select MMCONF_SUPPORT
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select MMCONF_SUPPORT_DEFAULT
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select NO_FIXED_XIP_ROM_SIZE
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select PARALLEL_MP
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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