soc/mediatek/mt8188: Add NOR-Flash support

Add NOR-Flash drivers for flash read/write.

TEST=read nor flash data successfully.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I4e84fc023111b86f7f4984020d24811e3361ba03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65621
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8188/Kconfig

@@ -6,6 +6,8 @@ config SOC_MEDIATEK_MT8188
 	select ARCH_ROMSTAGE_ARMV8_64
 	select ARCH_RAMSTAGE_ARMV8_64
 	select HAVE_UART_SPECIAL
+	select SOC_MEDIATEK_COMMON
+	select FLASH_DUAL_IO_READ
 
 if SOC_MEDIATEK_MT8188
 

src/soc/mediatek/mt8188/Makefile.inc

@@ -1,5 +1,6 @@
 ifeq ($(CONFIG_SOC_MEDIATEK_MT8188),y)
 
+all-y += ../common/flash_controller.c
 all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
 all-$(CONFIG_SPI_FLASH) += spi.c
 all-y += ../common/timer.c ../common/timer_prepare.c

src/soc/mediatek/mt8188/include/soc/spi.h

@@ -2,7 +2,7 @@
 
 /*
  * This file is created based on MT8188 Functional Specification
- * Chapter number: 5.8
+ * Chapter number: 5.8, 5.19
  */
 
 #ifndef MTK_MT8188_SPI_H
@@ -10,4 +10,6 @@
 
 #include <spi-generic.h>
 
+void mtk_snfc_init(void);
+
 #endif

src/soc/mediatek/mt8188/include/soc/symbols.h

@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _SOC_MEDIATEK_MT8188_SYMBOLS_H_
+#define _SOC_MEDIATEK_MT8188_SYMBOLS_H_
+
+#include <symbols.h>
+
+DECLARE_REGION(dram_dma)
+
+#endif /* _SOC_MEDIATEK_MT8188_SYMBOLS_H_ */

src/soc/mediatek/mt8188/spi.c

@@ -2,20 +2,52 @@
 
 /*
  * This file is created based on MT8188 Functional Specification
- * Chapter number: 5.8
+ * Chapter number: 5.8, 5.19
  */
 
 #include <device/mmio.h>
 #include <soc/addressmap.h>
+#include <soc/flash_controller_common.h>
+#include <soc/gpio.h>
 #include <soc/spi.h>
 
+struct pad_func {
+	gpio_t gpio;
+	u8 func;
+	enum pull_select select;
+};
+
+#define PAD_FUNC_SEL(name, func, sel) {GPIO(name), PAD_##name##_FUNC_##func, sel}
+
+static const struct pad_func nor_pinmux[4] = {
+	/* GPIO 125 ~ 128 */
+	PAD_FUNC_SEL(DMIC1_CLK, SPINOR_CK, GPIO_PULL_DOWN),
+	PAD_FUNC_SEL(DMIC1_DAT, SPINOR_CS, GPIO_PULL_UP),
+	PAD_FUNC_SEL(DMIC1_DAT_R, SPINOR_IO0, GPIO_PULL_DOWN),
+	PAD_FUNC_SEL(DMIC2_CLK, SPINOR_IO1, GPIO_PULL_DOWN),
+};
+
+void mtk_snfc_init(void)
+{
+	const struct pad_func *ptr = NULL;
+
+	ptr = nor_pinmux;
+	for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++) {
+		gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
+		gpio_set_mode(ptr[i].gpio, ptr[i].func);
+	}
+}
+
 static const struct spi_ctrlr spi_flash_ctrlr = {
 	.max_xfer_size = 65535,
+	.flash_probe = mtk_spi_flash_probe,
 };
 
 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
 	{
 		.ctrlr = &spi_flash_ctrlr,
+		.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+		.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
 	},
 };