From f648d619c994f856d6ca7d86fe18c532a974d31b Mon Sep 17 00:00:00 2001 From: Ward Vandewege Date: Mon, 8 Nov 2010 17:41:43 +0000 Subject: [PATCH] We can't print this early. This patch fixes a hang on supermicro/h8dme supermicro/h8dmr supermicro/h8dmr_fam10 and possibly on other mcp55-based boards. Signed-off-by: Ward Vandewege Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/nvidia/mcp55/mcp55_early_smbus.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_smbus.c b/src/southbridge/nvidia/mcp55/mcp55_early_smbus.c index 80a06188f1..469aa7e964 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_early_smbus.c +++ b/src/southbridge/nvidia/mcp55/mcp55_early_smbus.c @@ -32,11 +32,8 @@ static void enable_smbus(void) device_t dev; dev = pci_locate_device(PCI_ID(0x10de, 0x0368), 0); - if (dev == PCI_DEV_INVALID) { - printk(BIOS_WARNING, "SMBUS controller not found\n"); - } else { - printk(BIOS_DEBUG, "SMBus controller enabled\n"); - } + if (dev == PCI_DEV_INVALID) + die("SMBus controller not found\n"); /* set smbus iobase */ pci_write_config32(dev, 0x20, SMBUS0_IO_BASE | 1);