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soc/amd/picasso/fch: change sb prefix of sb_clk_output_48Mhz to fch 

Picasso has an integrated FCH and no south bridge, so change the sb
prefix to fch.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I82aed68104ea9570827646c818e100bd7e04d1af
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56526
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-07-22 17:38:27 +02:00
parent a754aa6d29
commit f66e781336
1 changed files with 2 additions and 2 deletions
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4
src/soc/amd/picasso/fch.c
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@ -86,7 +86,7 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association; return irq_association;
} }
static void sb_clk_output_48Mhz(void) static void fch_clk_output_48Mhz(void)
{ {
u32 ctrl; u32 ctrl;
const struct soc_amd_picasso_config *cfg = config_of_soc(); const struct soc_amd_picasso_config *cfg = config_of_soc();
@ -231,7 +231,7 @@ void fch_init(void *chip_info)
gpp_clk_setup(); gpp_clk_setup();
sb_clk_output_48Mhz(); fch_clk_output_48Mhz();
sb_rfmux_config_override(); sb_rfmux_config_override();
} }