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drivers/mrc_cache: Make bootstate for SPI writes variable

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The default time for writing MRC data to flash is at the exit of
BS_DEV_ENUMERATE but this is too early for some implementations.
Add an option to Kconfig for allowing a late option to be selected.
The timing of the late option is at the entry of BS_OS_RESUME_CHECK.

TEST=Select option and inspect console log on Kahlee
BUG=b:69614064

Change-Id: Ie7ba9070829d98414ee788e14d1a768145d742ea
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22937
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marshall Dawson 2017-12-18 15:56:44 -07:00 committed by Martin Roth
parent 9826d1b272
commit f69d2d6574
2 changed files with 16 additions and 3 deletions
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9
src/drivers/mrc_cache/Kconfig
View file

@ -29,4 +29,13 @@ config MRC_SETTINGS_VARIABLE_DATA
bool
default n
config MRC_WRITE_NV_LATE
bool
default n
help
MRC settings are normally written to NVRAM at BS_DEV_ENUMERATE-EXIT.
If a platform requires MRC settings written to NVRAM later than
normal, select this item. This will cause the write to occur at
BS_OS_RESUME_CHECK-ENTRY.
endif # CACHE_MRC_SETTINGS

10
src/drivers/mrc_cache/mrc_cache.c
View file

@ -574,8 +574,12 @@ static void update_mrc_cache(void *unused)
}
/*
* Ensures MRC training data is stored into SPI after PCI enumeration is done
* during BS_DEV_ENUMERATE-BS_ON_EXIT and lock down SPI protected ranges
* during BS_DEV_RESOURCES-BS_ON_EXIT.
* Ensures MRC training data is stored into SPI after PCI enumeration is done.
* Some implementations may require this to be later than others.
*/
#if IS_ENABLED(CONFIG_MRC_WRITE_NV_LATE)
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_ENTRY, update_mrc_cache, NULL);
#else
BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, update_mrc_cache, NULL);
#endif