mb/ocp/deltalake: Override uart base address via VPD variable

Use VPD of "coreboot_uart_io" to select uart io if
OVERRIDE_UART_FOR_CONSOLE is selected.

Tested=On OCP Delta Lake, console messages correctly output to uart
port which is defined in VPD.

Signed-off-by: Bryant Ou <Bryant.Ou.Q@gmail.com>
Change-Id: I55a85d6f137ef1aba95466e7b094740b685bf9bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
This commit is contained in:
Bryant Ou 2020-09-15 00:57:52 -07:00 committed by Patrick Georgi
parent f8b2d32ad9
commit f6efeae66c
5 changed files with 30 additions and 1 deletions

View File

@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select IPMI_OCP select IPMI_OCP
select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2
select OVERRIDE_UART_FOR_CONSOLE
config UART_FOR_CONSOLE config UART_FOR_CONSOLE
int int

View File

@ -8,5 +8,6 @@ romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi.c
ramstage-y += ramstage.c ipmi.c ramstage-y += ramstage.c ipmi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
all-$(CONFIG_OVERRIDE_UART_FOR_CONSOLE) += uartio_vpd.c
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH) CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH)

View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h> #include <console/console.h>
#include <console/uart.h>
#include <drivers/ipmi/ipmi_kcs.h> #include <drivers/ipmi/ipmi_kcs.h>
#include <drivers/ipmi/ocp/ipmi_ocp.h> #include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <drivers/vpd/vpd.h> #include <drivers/vpd/vpd.h>
@ -29,7 +30,10 @@ static void mainboard_config_upd(FSPM_UPD *mupd)
"SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT); "SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT);
mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT; mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
} }
mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8;
/* Select UART IO of FSP */
static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
mupd->FspmConfig.SerialIoUartDebugIoBase = bases[get_uart_for_console()];
if (mupd->FspmConfig.SerialIoUartDebugEnable) { if (mupd->FspmConfig.SerialIoUartDebugEnable) {
/* FSP debug log level */ /* FSP debug log level */

View File

@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <drivers/vpd/vpd.h>
#include <console/uart.h>
#include <string.h>
#include "vpd.h"
unsigned int get_uart_for_console(void)
{
int val_int;
if (vpd_get_int(COREBOOT_UART_IO, VPD_RW_THEN_RO, (int *const) &val_int)) {
if (val_int > 3)
val_int = COREBOOT_UART_IO_DEFAULT;
}
return val_int;
}

View File

@ -37,4 +37,8 @@
#define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark" #define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
#define FSPM_MEMREFRESHWATERMARK_DEFAULT 1 #define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
/* coreboot uart io select: 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8 */
#define COREBOOT_UART_IO "coreboot_uart_io"
#define COREBOOT_UART_IO_DEFAULT 1
#endif #endif