mb/ocp/deltalake: Override uart base address via VPD variable
Use VPD of "coreboot_uart_io" to select uart io if OVERRIDE_UART_FOR_CONSOLE is selected. Tested=On OCP Delta Lake, console messages correctly output to uart port which is defined in VPD. Signed-off-by: Bryant Ou <Bryant.Ou.Q@gmail.com> Change-Id: I55a85d6f137ef1aba95466e7b094740b685bf9bd Reviewed-on: https://review.coreboot.org/c/coreboot/+/45408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
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@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
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select IPMI_OCP
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select IPMI_OCP
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select OVERRIDE_UART_FOR_CONSOLE
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config UART_FOR_CONSOLE
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config UART_FOR_CONSOLE
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int
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int
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@ -8,5 +8,6 @@ romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi.c
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ramstage-y += ramstage.c ipmi.c
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ramstage-y += ramstage.c ipmi.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
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all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
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all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
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all-$(CONFIG_OVERRIDE_UART_FOR_CONSOLE) += uartio_vpd.c
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
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CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH)
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CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH)
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <drivers/ipmi/ipmi_kcs.h>
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#include <drivers/ipmi/ipmi_kcs.h>
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#include <drivers/ipmi/ocp/ipmi_ocp.h>
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#include <drivers/ipmi/ocp/ipmi_ocp.h>
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#include <drivers/vpd/vpd.h>
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#include <drivers/vpd/vpd.h>
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@ -29,7 +30,10 @@ static void mainboard_config_upd(FSPM_UPD *mupd)
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"SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT);
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"SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT);
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mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
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mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
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}
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}
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mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8;
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/* Select UART IO of FSP */
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static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
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mupd->FspmConfig.SerialIoUartDebugIoBase = bases[get_uart_for_console()];
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if (mupd->FspmConfig.SerialIoUartDebugEnable) {
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if (mupd->FspmConfig.SerialIoUartDebugEnable) {
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/* FSP debug log level */
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/* FSP debug log level */
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@ -0,0 +1,19 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <drivers/vpd/vpd.h>
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#include <console/uart.h>
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#include <string.h>
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#include "vpd.h"
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unsigned int get_uart_for_console(void)
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{
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int val_int;
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if (vpd_get_int(COREBOOT_UART_IO, VPD_RW_THEN_RO, (int *const) &val_int)) {
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if (val_int > 3)
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val_int = COREBOOT_UART_IO_DEFAULT;
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}
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return val_int;
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}
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@ -37,4 +37,8 @@
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#define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
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#define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
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#define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
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#define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
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/* coreboot uart io select: 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8 */
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#define COREBOOT_UART_IO "coreboot_uart_io"
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#define COREBOOT_UART_IO_DEFAULT 1
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#endif
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#endif
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