From f72349d832180503304e68c1462f242699cb6c36 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 29 Sep 2021 15:33:55 +0530 Subject: [PATCH] mb/intel/adlrvp: Update Rcomp target value for DDR4 RVP SKU Update to recommended Rcomp drive strength value for DDR4 as per MRC team's input. Additionally, add space around the `targets` array. Change-Id: Ied63913db94b2e52ab394a66c70f7edfd507d99a Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/58036 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Tim Wawrzynczak --- src/mainboard/intel/adlrvp/memory.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c index 353cf4eff8..f93b361267 100644 --- a/src/mainboard/intel/adlrvp/memory.c +++ b/src/mainboard/intel/adlrvp/memory.c @@ -13,7 +13,7 @@ static const struct mb_cfg ddr4_mem_config = { .resistor = 100, /* Baseboard Rcomp target values */ - .targets = {40, 30, 33, 33, 30}, + .targets = { 50, 20, 25, 25, 25 }, }, .ect = true, /* Early Command Training */ @@ -155,7 +155,7 @@ static const struct mb_cfg ddr5_mem_config = { .resistor = 100, /* Baseboard Rcomp target values */ - .targets = {50, 30, 30, 30, 27}, + .targets = { 50, 30, 30, 30, 27 }, }, .ect = true, /* Early Command Training */