From f72ff36e76d0fb990655da8922ee695a0f8afecc Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 3 Sep 2003 12:09:44 +0000 Subject: [PATCH] cosmetics git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/coherent_ht.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 5eb127c402..9145a42a29 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -99,15 +99,17 @@ static void notify_bsp_ap_is_stopped(void) unsigned long apic_id; apic_id = *((volatile unsigned long *)(APIC_DEFAULT_BASE+APIC_ID)); apic_id >>= 24; -/* print_debug("applicaton cpu apic_id: "); - print_debug_hex32(apic_id); - print_debug("\r\n"); - }*/ - if(apic_id!=0) { //AP apic_id == node_id ?? -// set the ColdResetbit to notify BSP that AP is stopped +#if 0 + print_debug("applicaton cpu apic_id: "); + print_debug_hex32(apic_id); + print_debug("\r\n"); +#endif + /* AP apic_id == node_id ? */ + if(apic_id != 0) { + /* set the ColdResetbit to notify BSP that AP is stopped */ reg = pci_read_config32(NODE_HT(apic_id), 0x6C); reg |= 1<<4; - pci_write_config32(NODE_HT(apic_id), 0x6C, reg); + pci_write_config32(NODE_HT(apic_id), 0x6C, reg); } }