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via epia-m now works with default x86.c instead of its own copy of vgabios.c. 

Allows to drop quite a bunch of nasty code

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-04-22 18:15:32 +00:00 committed by Stefan Reinauer
parent 64d3baf982
commit f75b19ac85
13 changed files with 168 additions and 1024 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/devices/oprom/x86.c
View File

@ -318,7 +318,7 @@ int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,
/* Pass errors back to our caller via the CARRY flag */
if (ret) {
printk(BIOS_DEBUG,"error!\n");
printk(BIOS_DEBUG,"int%02x call returned error.\n", intnumber);
flags |= 1; // error: set carry
}else{
flags &= ~1; // no error: clear carry

2
src/devices/oprom/x86_asm.S
View File

@ -257,8 +257,6 @@ __run_vsa = RELOCATED(.)
.globl __run_interrupt
__run_interrupt = RELOCATED(.)
/* paranoia -- does ecx get saved? not sure. This is
* the easiest safe thing to do. */
pushal
/* save the stack */
mov %esp, __stack

16
src/mainboard/via/epia-m/Kconfig
View File

@ -22,24 +22,8 @@ config MAINBOARD_PART_NUMBER
default "EPIA-M"
depends on BOARD_VIA_EPIA_M
config RAMBASE
hex
default 0x4000
depends on BOARD_VIA_EPIA_M
config IRQ_SLOT_COUNT
int
default 5
depends on BOARD_VIA_EPIA_M
# this is done by this board's vgabios.c already
config VGA_ROM_RUN
bool
default n
depends on BOARD_VIA_EPIA_M
config PCI_ROM_RUN
bool
default n
depends on BOARD_VIA_EPIA_M

23
src/mainboard/via/epia-m/Makefile.inc
View File

@ -1,23 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 VIA Technologies, Inc.
## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
obj-y += vgabios.o

4
src/mainboard/via/epia-m/devicetree.cb
View File

@ -7,6 +7,10 @@ chip northbridge/via/vt8623
end
device pci_domain 0 on
device pci 0.0 on end
device pci 1.0 on end
chip southbridge/via/vt8235
device pci 10.0 on end # USB 1.1

35
src/mainboard/via/epia-m/mainboard.c
View File

@ -1,40 +1,5 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <arch/io.h>
#include "chip.h"
#include "vgachip.h"
static void vga_fixup(void) {
// we do this right here because:
// - all the hardware is working, and some VGA bioses seem to need
// that
// - we need page 0 below for coreboot tables.
printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n");
setup_realmode_idt();
printk(BIOS_DEBUG, "DO THE VGA BIOS\n");
do_vgabios();
post_code(0x93);
vga_enable_console();
}
void write_protect_vgabios(void)
{
device_t dev;
printk(BIOS_INFO, "write_protect_vgabios\n");
/* there are two possible devices. Just do both. */
dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
if(dev)
pci_write_config8(dev, 0x61, 0xaa);
dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
if(dev)
pci_write_config8(dev, 0x61, 0xaa);
}
struct chip_operations mainboard_ops = {
CHIP_NAME("VIA EPIA-M Mainboard")

15
src/mainboard/via/epia-m/romstage.c
View File

@ -30,7 +30,7 @@ static void enable_mainboard_devices(void)
{
device_t dev;
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_8235), 0);
if (dev == PCI_DEV_INVALID) {
@ -82,7 +82,7 @@ static void main(unsigned long bist)
* Disable the firewire stuff, which apparently steps on IO 0+ on
* reset. Doh!
*/
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_6305), 0);
if (dev != PCI_DEV_INVALID) {
pci_write_config8(dev, 0x15, 0x1c);
@ -94,14 +94,12 @@ static void main(unsigned long bist)
enable_smbus();
print_spew("In romstage.c:main()\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
// init_timer();
outb(5, 0x80);
post_code(0x05);
print_debug(" Enabling mainboard devices\n");
enable_mainboard_devices();
@ -112,19 +110,12 @@ static void main(unsigned long bist)
ddr_ram_setup((const struct mem_controller *)0);
/* Check all of memory */
#if 0
ram_check(0x00000000, msr.lo);
#endif
#if 0
static const struct {
unsigned long lo, hi;
} check_addrs[] = {
/* Check 16MB of memory @ 0*/
{ 0x00000000, 0x01000000 },
#if TOTAL_CPUS > 1
/* Check 16MB of memory @ 2GB */
{ 0x80000000, 0x81000000 },
#endif
};
int i;
for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {

839
src/mainboard/via/epia-m/vgabios.c
View File

@ -1,839 +0,0 @@
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#undef __KERNEL__
#include <arch/io.h>
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */
/*------------------------------------------------------------ -*- C -*-
* 2 Kernel Monte a.k.a. Linux loading Linux on x86
*
* Erik Arjan Hendriks <hendriks@lanl.gov>
*
* This version is a derivative of the original two kernel monte
* which is (C) 2000 Scyld.
*
* Copyright (C) 2000 Scyld Computing Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* Portions related to the alpha architecture are:
*
* Copyright(C) 2001 University of California. LA-CC Number 01-67.
* This software has been authored by an employee or employees of the
* University of California, operator of the Los Alamos National
* Laboratory under Contract No. W-7405-ENG-36 with the U.S.
* Department of Energy. The U.S. Government has rights to use,
* reproduce, and distribute this software. If the software is
* modified to produce derivative works, such modified software should
* be clearly marked, so as not to confuse it with the version
* available from LANL.
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by
* reference to http://www.gnu.org/licenses/gpl.html.
*
* This software is provided by the author(s) "as is" and any express
* or implied warranties, including, but not limited to, the implied
* warranties of merchantability and fitness for a particular purpose
* are disclaimed. In no event shall the author(s) be liable for any
* direct, indirect, incidental, special, exemplary, or consequential
* damages (including, but not limited to, procurement of substitute
* goods or services; loss of use, data, or profits; or business
* interruption) however caused and on any theory of liability,
* whether in contract, strict liability, or tort (including
* negligence or otherwise) arising in any way out of the use of this
* software, even if advised of the possibility of such damage.
*
* $Id: vgabios.c,v 1.5 2004/10/06 17:33:52 rminnich Exp $
*--------------------------------------------------------------------*/
/* Modified to be a self sufficient plug in so that it can be used
without reliance on other parts of core coreboot
(C) 2005 Nick.Barker9@btinternet.com
Used initially for epia-m where there are problems getting the bios
emulator to successfully run this bios.
*/
/* Declare a temporary global descriptor table - necessary because the
Core part of the bios no longer sets up any 16 bit segments */
__asm__ (
/* pointer to original gdt */
"gdtarg: \n"
" .word gdt_limit \n"
" .long gdt \n"
/* compute the table limit */
"__mygdt_limit = __mygdt_end - __mygdt - 1 \n"
"__mygdtaddr: \n"
" .word __mygdt_limit \n"
" .long __mygdt \n"
"__mygdt: \n"
/* selgdt 0, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 8, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x10, flat code segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x9b, 0xcf, 0x00 \n"
/* selgdt 0x18, flat data segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x93, 0xcf, 0x00 \n"
/* selgdt 0x20, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x28 16-bit 64k code at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x9a, 0, 0 \n"
/* selgdt 0x30 16-bit 64k data at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x92, 0, 0 \n"
"__mygdt_end: \n"
);
/* Declare a pointer to where our idt is going to be i.e. at mem zero */
__asm__ ("__myidt: \n"
/* 16-bit limit */
" .word 1023 \n"
/* 24-bit base */
" .long 0 \n"
" .word 0 \n"
);
/* The address arguments to this function are PHYSICAL ADDRESSES */
static void real_mode_switch_call_vga(unsigned long devfn)
{
__asm__ __volatile__ (
// paranoia -- does ecx get saved? not sure. This is
// the easiest safe thing to do.
" pushal \n"
/* save the stack */
" mov %esp, __stack \n"
" jmp 1f \n"
"__stack: .long 0 \n"
"1:\n"
/* get devfn into %ecx */
" movl %esp, %ebp \n"
" movl 8(%ebp), %ecx \n"
/* load 'our' gdt */
" lgdt %cs:__mygdtaddr \n"
/* This configures CS properly for real mode. */
" ljmp $0x28, $__rms_16bit\n"
"__rms_16bit: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax \n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real\n"
"__rms_real: \n"
/* put the stack at the end of page zero.
* that way we can easily share it between real and protected,
* since the 16-bit ESP at segment 0 will work for any case.
/* Setup a stack */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
" movl $0x1000, %eax \n"
" movl %eax, %esp \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov $0x40, %ax \n"
" mov %ax, %ds \n"
" mov %cx, %ax \n"
/* run VGA BIOS at 0xc000:0003 */
" lcall $0xc000, $0x0003\n"
/* if we got here, just about done.
* Need to get back to protected mode */
" movl %cr0, %eax \n"
" orl $0x0000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0 \n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $vgarestart\n"
"vgarestart:\n"
" .code32\n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* restore proper gdt and idt */
" lgdt %cs:gdtarg \n"
" lidt idtarg \n"
".globl vga_exit \n"
"vga_exit: \n"
" mov __stack, %esp \n"
" popal \n"
);
}
__asm__ (".text\n""real_mode_switch_end:\n");
extern char real_mode_switch_end[];
/* call vga bios int 10 function 0x4f14 to enable main console
epia-m does not always autosence the main console so forcing it on is good !! */
void vga_enable_console()
{
__asm__ __volatile__ (
/* paranoia -- does ecx get saved? not sure. This is
* the easiest safe thing to do. */
" pushal \n"
/* save the stack */
" mov %esp, __stack \n"
/* load 'our' gdt */
" lgdt %cs:__mygdtaddr \n"
/* This configures CS properly for real mode. */
" ljmp $0x28, $__vga_ec_16bit\n"
"__vga_ec_16bit: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax\n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__vga_ec_real \n"
"__vga_ec_real: \n"
/* put the stack at the end of page zero.
* that way we can easily share it between real and protected,
* since the 16-bit ESP at segment 0 will work for any case.
/* Setup a stack */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
" movl $0x1000, %eax \n"
" movl %eax, %esp \n"
/* debugging for RGM */
" mov $0x11, %al \n"
" outb %al, $0x80 \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
/* ask bios to enable main console */
/* set up for int 10 call - values found from X server
* bios call routines */
" movw $0x4f14,%ax \n"
" movw $0x8003,%bx \n"
" movw $1, %cx \n"
" movw $0, %dx \n"
" movw $0, %di \n"
" int $0x10 \n"
" movb $0x55, %al \n"
" outb %al, $0x80 \n"
/* if we got here, just about done.
* Need to get back to protected mode */
" movl %cr0, %eax \n"
" orl $0x0000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0 \n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $vga_ec_restart\n"
"vga_ec_restart:\n"
" .code32\n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* restore proper gdt and idt */
" lgdt %cs:gdtarg \n"
" lidt idtarg \n"
" .globl vga__ec_exit \n"
"vga_ec_exit:\n"
" mov __stack, %esp \n"
" popal\n"
);
}
void do_vgabios(void)
{
device_t dev;
unsigned long busdevfn;
unsigned int rom = 0;
unsigned char *buf;
unsigned int size = 64*1024;
int i;
/* clear vga bios data area */
for (i = 0x400; i < 0x500; i++) {
*(unsigned char *) i = 0;
}
dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0);
if (!dev) {
printk(BIOS_DEBUG, "NO VGA FOUND\n");
return;
}
printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device);
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk(BIOS_DEBUG, "rom base, size: %x\n", rom);
buf = (unsigned char *) rom;
if ((buf[0] == 0x55) && (buf[1] == 0xaa)) {
memcpy((void *) 0xc0000, buf, size);
write_protect_vgabios(); // in northbridge
// check signature again
buf = (unsigned char *) 0xc0000;
if (buf[0]==0x55 && buf[1]==0xAA) {
busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n");
} else
printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]);
pci_write_config32(dev, PCI_ROM_ADDRESS, 0);
}
// we had hoped to avoid this.
// this is a stub IDT only. It's main purpose is to ignore calls
// to the BIOS.
// no longer. Dammit. We have to respond to these.
struct realidt {
unsigned short offset, cs;
};
// from a handy writeup that andrey found.
// handler.
// There are some assumptions we can make here.
// First, the Top Of Stack (TOS) is located on the top of page zero.
// we can share this stack between real and protected mode.
// that simplifies a lot of things ...
// we'll just push all the registers on the stack as longwords,
// and pop to protected mode.
// second, since this only ever runs as part of coreboot,
// we know all the segment register values -- so we don't save any.
// keep the handler that calls things small. It can do a call to
// more complex code in coreboot itself. This helps a lot as we don't
// have to do address fixup in this little stub, and calls are absolute
// so the handler is relocatable.
void handler(void)
{
__asm__ __volatile__ (
" .code16 \n"
"idthandle: \n"
" pushal \n"
" movb $0, %al \n"
" ljmp $0, $callbiosint16\n"
"end_idthandle: \n"
" .code32 \n"
);
}
void debughandler(void)
{
__asm__ __volatile__ (
" .code16 \n"
"debughandle: \n"
" pushw %cx \n"
" movw $250, %cx \n"
"dbh1: \n"
" loop dbh1 \n"
" popw %cx \n"
" iret \n"
"end_debughandle: \n"
".code32 \n"
);
}
// Calling conventions. The first C function is called with this stuff
// on the stack. They look like value parameters, but note that if you
// modify them they will go back to the INTx function modified.
// the C function will call the biosint function with these as
// REFERENCE parameters. In this way, we can easily get
// returns back to the INTx caller (i.e. vgabios)
void callbiosint(void)
{
__asm__ __volatile__ (
" .code16 \n"
"callbiosint16: \n"
" push %ds \n"
" push %es \n"
" push %fs \n"
" push %gs \n"
// clean up the int #. To save space we put it in the lower
// byte. But the top 24 bits are junk.
" andl $0xff, %eax\n"
// this push does two things:
// - put the INT # on the stack as a parameter
// - provides us with a temp for the %cr0 mods.
" pushl %eax \n"
" movl %cr0, %eax\n"
" orl $0x00000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0\n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $biosprotect\n"
"biosprotect: \n"
" .code32 \n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
" lidt idtarg \n"
" call biosint \n"
// back to real mode ...
" ljmp $0x28, $__rms_16bit2\n"
"__rms_16bit2: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax \n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real2 \n"
"__rms_real2: \n"
/* Setup a stack
* FixME: where is esp? */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
/* ebugging for RGM */
" mov $0x11, %al \n"
" outb %al, $0x80 \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov $0x40, %ax \n"
" mov %ax, %ds \n"
/* pop the INT # that you pushed earlier */
" popl %eax \n"
" pop %gs \n"
" pop %fs \n"
" pop %es \n"
" pop %ds \n"
" popal \n"
" iret \n"
" .code32 \n"
);
}
enum {
PCIBIOS = 0x1a,
MEMSIZE = 0x12
};
int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags);
int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags
);
extern void vga_exit(void);
int biosint(unsigned long intnumber,
unsigned long gsfs, unsigned long dses,
unsigned long edi, unsigned long esi,
unsigned long ebp, unsigned long esp,
unsigned long ebx, unsigned long edx,
unsigned long ecx, unsigned long eax,
unsigned long cs_ip, unsigned short stackflags)
{
unsigned long ip;
unsigned long cs;
unsigned long flags;
int ret = -1;
ip = cs_ip & 0xffff;
cs = cs_ip >> 16;
flags = stackflags;
printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber);
printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *) esp);
esp += 2;
}
printk(BIOS_DEBUG, "\n");
}
printk(BIOS_DEBUG, "biosint: Bailing out\n");
// "longjmp"
vga_exit();
break;
case PCIBIOS:
ret = pcibios( &edi, &esi, &ebp, &esp,
&ebx, &edx, &ecx, &eax, &flags);
break;
case MEMSIZE:
// who cares.
eax = 64 * 1024;
ret = 0;
break;
case 0x15:
ret=handleint21( &edi, &esi, &ebp, &esp,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
flags |= 1; // carry flags
else
flags &= ~1;
stackflags = flags;
return ret;
}
void setup_realmode_idt(void)
{
extern unsigned char idthandle, end_idthandle;
extern unsigned char debughandle, end_debughandle;
int i;
struct realidt *idts = (struct realidt *) 0;
int codesize = &end_idthandle - &idthandle;
unsigned char *intbyte, *codeptr;
// for each int, we create a customized little handler
// that just pushes %ax, puts the int # in %al,
// then calls the common interrupt handler.
// this necessitated because intel didn't know much about
// architecture when they did the 8086 (it shows)
// (hmm do they know anymore even now :-)
// obviously you can see I don't really care about memory
// efficiency. If I did I would probe back through the stack
// and get it that way. But that's really disgusting.
for (i = 0; i < 256; i++) {
idts[i].cs = 0;
codeptr = (char*) 4096 + i * codesize;
idts[i].offset = (unsigned) codeptr;
memcpy(codeptr, &idthandle, codesize);
intbyte = codeptr + 3;
*intbyte = i;
}
// fixed entry points
// VGA BIOSes tend to hardcode f000:f065 as the previous handler of
// int10.
// calling convention here is the same as INTs, we can reuse
// the int entry code.
codeptr = (char*) 0xff065;
memcpy(codeptr, &idthandle, codesize);
intbyte = codeptr + 3;
*intbyte = 0x42; /* int42 is the relocated int10 */
/* debug handler - useful to set a programmable delay between instructions if the
TF bit is set upon call to real mode */
idts[1].cs = 0;
idts[1].offset = 16384;
memcpy(16384, &debughandle, &end_debughandle - &debughandle);
}
enum {
CHECK = 0xb001,
FINDDEV = 0xb102,
READCONFBYTE = 0xb108,
READCONFWORD = 0xb109,
READCONFDWORD = 0xb10a,
WRITECONFBYTE = 0xb10b,
WRITECONFWORD = 0xb10c,
WRITECONFDWORD = 0xb10d
};
// errors go in AH. Just set these up so that word assigns
// will work. KISS.
enum {
PCIBIOS_NODEV = 0x8600,
PCIBIOS_BADREG = 0x8700
};
int
pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags)
{
unsigned long edi = *pedi;
unsigned long esi = *pesi;
unsigned long ebp = *pebp;
unsigned long esp = *pesp;
unsigned long ebx = *pebx;
unsigned long edx = *pedx;
unsigned long ecx = *pecx;
unsigned long eax = *peax;
unsigned long flags = *pflags;
unsigned short func = (unsigned short) eax;
int retval = 0;
unsigned short devid, vendorid, devfn;
short devindex; /* Use short to get rid of gabage in upper half of 32-bit register */
unsigned char bus;
device_t dev;
switch(func) {
case CHECK:
*pedx = 0x4350;
*pecx = 0x2049;
retval = 0;
break;
case FINDDEV:
{
devid = *pecx;
vendorid = *pedx;
devindex = *pesi;
dev = 0;
while ((dev = dev_find_device(vendorid, devid, dev))) {
if (devindex <= 0)
break;
devindex--;
}
if (dev) {
unsigned short busdevfn;
*peax = 0;
// busnum is an unsigned char;
// devfn is an int, so we mask it off.
busdevfn = (dev->bus->secondary << 8)
| (dev->path.pci.devfn & 0xff);
printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
*pebx = busdevfn;
retval = 0;
} else {
*peax = PCIBIOS_NODEV;
retval = -1;
}
}
break;
case READCONFDWORD:
case READCONFWORD:
case READCONFBYTE:
case WRITECONFDWORD:
case WRITECONFWORD:
case WRITECONFBYTE:
{
unsigned long dword;
unsigned short word;
unsigned char byte;
unsigned char reg;
devfn = *pebx & 0xff;
bus = *pebx >> 8;
reg = *pedi;
dev = dev_find_slot(bus, devfn);
if (! dev) {
printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
*peax = PCIBIOS_BADREG;
retval = -1;
}
switch(func) {
case READCONFBYTE:
byte = pci_read_config8(dev, reg);
*pecx = byte;
break;
case READCONFWORD:
word = pci_read_config16(dev, reg);
*pecx = word;
break;
case READCONFDWORD:
dword = pci_read_config32(dev, reg);
*pecx = dword;
break;
case WRITECONFBYTE:
byte = *pecx;
pci_write_config8(dev, reg, byte);
break;
case WRITECONFWORD:
word = *pecx;
pci_write_config16(dev, reg, word);
break;
case WRITECONFDWORD:
dword = *pecx;
pci_write_config32(dev, reg, dword);
break;
}
if (retval)
retval = PCIBIOS_BADREG;
printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
func, bus, devfn, reg, *pecx);
*peax = 0;
retval = 0;
}
break;
default:
printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
break;
}
return retval;
}
int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp,
unsigned long *esp, unsigned long *ebx, unsigned long *edx,
unsigned long *ecx, unsigned long *eax, unsigned long *flags)
{
int res=-1;
switch(*eax&0xffff)
{
case 0x5f19:
break;
case 0x5f18:
*eax=0x5f;
*ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
*ecx=0x060;
res=0;
break;
case 0x5f00:
*eax = 0x8600;
break;
case 0x5f01:
*eax = 0x5f;
*ecx = (*ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 0;
break;
case 0x5f02:
*eax=0x5f;
*ebx= (*ebx & 0xffff0000) | 2;
*ecx= (*ecx & 0xffff0000) | 0x401; // PAL + crt only
*edx= (*edx & 0xffff0000) | 0; // TV Layout - default
res=0;
break;
case 0x5f0f:
*eax=0x860f;
break;
}
return res;
}

15
src/mainboard/via/epia-m/vgachip.h
View File

@ -1,15 +0,0 @@
#ifndef _PC80_VGABIOS
#define _PC80_VGABIOS
extern struct chip_control pc80_vgabios_control;
struct pc80_vgabios_config {
int nothing;
};
void vga_enable_console(void);
void do_vgabios(void);
void setup_realmode_idt(void);
void write_protect_vgabios(void);
#endif /* _PC80_VGABIOS */

1
src/northbridge/via/vt8623/Makefile.inc
View File

@ -19,4 +19,5 @@
##
driver-y += northbridge.o
driver-y += vga.o

76
src/northbridge/via/vt8623/northbridge.c
View File

@ -105,82 +105,6 @@ static const struct pci_driver agp_driver __pci_driver = {
.device = PCI_DEVICE_ID_VIA_8633_1,
};
static void vga_init(device_t dev)
{
//unsigned long fb;
//msr_t clocks1,clocks2,instructions,setup;
printk(BIOS_DEBUG, "VGA random fixup ...\n");
pci_write_config8(dev, 0x04, 0x07);
pci_write_config8(dev, 0x0d, 0x20);
pci_write_config32(dev,0x10,0xd8000008);
pci_write_config32(dev,0x14,0xdc000000);
// set up performnce counters for debugging vga init sequence
//setup.lo = 0x1c0; // count instructions
//wrmsr(0x187,setup);
//instructions.hi = 0;
//instructions.lo = 0;
//wrmsr(0xc2,instructions);
//clocks1 = rdmsr(0x10);
#if 0
/* code to make vga init go through the emulator - as of yet this does not workfor the epia-m */
pci_dev_init(dev);
call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
//clocks2 = rdmsr(0x10);
//instructions = rdmsr(0xc2);
printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
#else
/* code to make vga init run in real mode - does work but against the current coreboot philosophy */
printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n");
setup_realmode_idt();
printk(BIOS_DEBUG, "DO THE VGA BIOS\n");
do_vgabios();
//clocks2 = rdmsr(0x10);
//instructions = rdmsr(0xc2);
//printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
//printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
//printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
vga_enable_console();
#endif
pci_write_config32(dev,0x30,0);
/* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
#if 0
add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
fb = pci_read_config32(dev,0x10); // get the fb address
add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
#endif
}
static struct device_operations vga_operations = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = vga_init,
.ops_pci = 0,
};
static const struct pci_driver vga_driver __pci_driver = {
.ops = &vga_operations,
.vendor = PCI_VENDOR_ID_VIA,
.device = 0x3122,
};
static void ram_resource(device_t dev, unsigned long index,
unsigned long basek, unsigned long sizek)
{

6
src/northbridge/via/vt8623/northbridge.h
View File

@ -2,11 +2,7 @@
#define NORTHBRIDGE_VIA_VT8623_H
unsigned int vt8623_scan_root_bus(device_t root, unsigned int max);
void vga_enable_console(void);
void do_vgabios(void);
void setup_realmode_idt(void);
extern void (*vga_enable_console)(void) __attribute__((regparm(0)));
void write_protect_vgabios(void);
#endif /* NORTHBRIDGE_VIA_VT8623_H */

158
src/northbridge/via/vt8623/vga.c Normal file
View File

@ -0,0 +1,158 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "chip.h"
#include "northbridge.h"
static int via_vt8623_int15_handler(struct eregs *regs)
{
int res=-1;
printk(BIOS_DEBUG, "via_vt8623_int15_handler\n");
switch(regs->eax & 0xffff) {
case 0x5f19:
break;
case 0x5f18:
regs->eax=0x5f;
regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
regs->ecx=0x060;
res=0;
break;
case 0x5f00:
regs->eax = 0x8600;
break;
case 0x5f01:
regs->eax = 0x5f;
regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 0;
break;
case 0x5f02:
regs->eax=0x5f;
regs->ebx= (regs->ebx & 0xffff0000) | 2;
regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default
res=0;
break;
case 0x5f0f:
regs->eax=0x860f;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
regs->eax & 0xffff);
break;
}
return res;
}
void write_protect_vgabios(void)
{
device_t dev;
printk(BIOS_DEBUG, "write_protect_vgabios\n");
dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
if (dev)
pci_write_config8(dev, 0x61, 0xaa);
dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
if (dev)
pci_write_config8(dev, 0x61, 0xaa);
}
static void vga_random_fixup(device_t dev)
{
printk(BIOS_DEBUG, "VGA random fixup ...\n");
pci_write_config8(dev, 0x04, 0x07);
pci_write_config8(dev, 0x0d, 0x20);
pci_write_config32(dev,0x10,0xd8000008);
pci_write_config32(dev,0x14,0xdc000000);
}
static void vga_init(device_t dev)
{
vga_random_fixup(dev);
mainboard_interrupt_handlers(0x15, &via_vt8623_int15_handler);
#ifdef MEASURE_VGA_INIT_TIME
msr_t clocks1, clocks2, instructions, setup;
// set up performnce counters for debugging vga init sequence
setup.lo = 0x1c0; // count instructions
wrmsr(0x187,setup);
instructions.hi = 0;
instructions.lo = 0;
wrmsr(0xc2,instructions);
clocks1 = rdmsr(0x10);
#endif
printk(BIOS_DEBUG, "Initializing VGA...\n");
pci_dev_init(dev);
printk(BIOS_DEBUG, "Enable VGA console\n");
// this is how it should look:
// call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
// this is how it looks:
vga_enable_console();
#ifdef MEASURE_VGA_INIT_TIME
clocks2 = rdmsr(0x10);
instructions = rdmsr(0xc2);
printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
#endif
pci_write_config32(dev, 0x30, 0);
#if 0
/* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
unsigned long fb;
add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
fb = pci_read_config32(dev,0x10); // get the fb address
add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
#endif
}
static struct device_operations vga_operations = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = vga_init,
.ops_pci = 0,
};
static const struct pci_driver vga_driver __pci_driver = {
.ops = &vga_operations,
.vendor = PCI_VENDOR_ID_VIA,
.device = 0x3122,
};