Drop useless mainboard-romstage defines

Some src/mainboard/*/*/romstage.c files use defines which later
modify the behaviour of included .c files.
Since it's a pain to work out what is affected by these, drop
values that are only defined in the board but never used, or
defined to identical values as in spd.h (and use that one instead).

Change-Id: I8143b26fddc32a40ac4e611a6287bf7f144267dc
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/5639
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/mainboard/amd/bimini_fam10/romstage.c

@@ -67,9 +67,6 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
-#define RC00  0
-#define RC01  1
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	struct sys_info *sysinfo = &sysinfo_car;

src/mainboard/amd/dbm690t/romstage.c

@@ -17,11 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>

src/mainboard/amd/mahogany/romstage.c

@@ -17,11 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>

src/mainboard/asrock/939a785gmh/romstage.c

@@ -18,11 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>

src/mainboard/kontron/kt690/romstage.c

@@ -18,11 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>

src/mainboard/siemens/sitemp_g1p1/romstage.c

@@ -19,15 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define DIMM0 0x50
-#define DIMM1 0x51
-
-#define ICS951462_ADDRESS	0x69
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -36,6 +27,7 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
+#include <spd.h>
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/supermicro/h8scm_fam10/romstage.c

@@ -68,15 +68,6 @@ static int spd_read_byte(u32 device, u32 address)
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 
-//#include "spd_addr.h"
-
-#define RC00  0
-
-#define DIMM0 0x50
-#define DIMM1 0x51
-#define DIMM2 0x52
-#define DIMM3 0x53
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	struct sys_info *sysinfo = &sysinfo_car;

src/mainboard/technexion/tim5690/romstage.c

@@ -17,11 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>

src/mainboard/technexion/tim8690/romstage.c

@@ -17,11 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#define RC0 (6<<8)
-#define RC1 (7<<8)
-
-#define SMBUS_HUB 0x71
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>