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mb/google/nissa: Lock gpio pins in fw config for nissa variants 

There is a new ground rule, variant should honor baseboard lock gpios.
Thus, lock the gpio which is locked in baseboard.

BUG=b:216671701
TEST=check gpios are locked in pinctrl dump.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ieed2d40b0222d8c8c193e0590131f83a5d96add9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Eric Lai 2022-07-01 14:03:24 +08:00 committed by Felix Held
parent cd4264fbe7
commit f777cad791
2 changed files with 17 additions and 17 deletions
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12
src/mainboard/google/brya/variants/craask/fw_config.c
View File

@ -19,16 +19,16 @@ static const struct pad_config lte_disable_pads[] = {
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC(GPP_F12, NONE), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
}; };
static const struct pad_config wfc_disable_pads[] = { static const struct pad_config wfc_disable_pads[] = {
/* D3 : WCAM_RST_L */ /* D3 : WCAM_RST_L */
PAD_NC(GPP_D3, NONE), PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D15 : EN_PP2800_WCAM_X */ /* D15 : EN_PP2800_WCAM_X */
PAD_NC(GPP_D15, NONE), PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
/* D16 : EN_PP1800_PP1200_WCAM_X */ /* D16 : EN_PP1800_PP1200_WCAM_X */
PAD_NC(GPP_D16, NONE), PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
/* H22 : WCAM_MCLK_R */ /* H22 : WCAM_MCLK_R */
PAD_NC(GPP_H22, NONE), PAD_NC(GPP_H22, NONE),
/* R6 : DMIC_WCAM_CLK_R */ /* R6 : DMIC_WCAM_CLK_R */
@ -41,9 +41,9 @@ static const struct pad_config sd_disable_pads[] = {
/* D8 : SD_CLKREQ_ODL */ /* D8 : SD_CLKREQ_ODL */
PAD_NC(GPP_D8, NONE), PAD_NC(GPP_D8, NONE),
/* H12 : SD_PERST_L */ /* H12 : SD_PERST_L */
PAD_NC(GPP_H12, NONE), PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
/* H13 : EN_PP3300_SD_X */ /* H13 : EN_PP3300_SD_X */
PAD_NC(GPP_H13, NONE), PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
}; };
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)

22
src/mainboard/google/brya/variants/nivviks/fw_config.c
View File

@ -20,32 +20,32 @@ static const struct pad_config lte_disable_pads_nivviks[] = {
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC(GPP_F12, NONE), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
}; };
static const struct pad_config lte_disable_pads_nirwen[] = { static const struct pad_config lte_disable_pads_nirwen[] = {
/* E13 : WWAN_EN */ /* E13 : WWAN_EN */
PAD_NC(GPP_E13, NONE), PAD_NC_LOCK(GPP_E13, NONE, LOCK_CONFIG),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC(GPP_F12, NONE), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
}; };
static const struct pad_config sd_disable_pads[] = { static const struct pad_config sd_disable_pads[] = {
/* D8 : SD_CLKREQ_ODL */ /* D8 : SD_CLKREQ_ODL */
PAD_NC(GPP_D8, NONE), PAD_NC(GPP_D8, NONE),
/* H12 : SD_PERST_L */ /* H12 : SD_PERST_L */
PAD_NC(GPP_H12, NONE), PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
/* H13 : EN_PP3300_SD_X */ /* H13 : EN_PP3300_SD_X */
PAD_NC(GPP_H13, NONE), PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
}; };
static const struct pad_config wfc_disable_pads[] = { static const struct pad_config wfc_disable_pads[] = {
/* D3 : WCAM_RST_L */ /* D3 : WCAM_RST_L */
PAD_NC(GPP_D3, NONE), PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D15 : EN_PP2800_WCAM_X */ /* D15 : EN_PP2800_WCAM_X */
PAD_NC(GPP_D15, NONE), PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
/* D16 : EN_PP1800_PP1200_WCAM_X */ /* D16 : EN_PP1800_PP1200_WCAM_X */
PAD_NC(GPP_D16, NONE), PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
/* H22 : WCAM_MCLK_R */ /* H22 : WCAM_MCLK_R */
PAD_NC(GPP_H22, NONE), PAD_NC(GPP_H22, NONE),
/* R6 : DMIC_WCAM_CLK_R */ /* R6 : DMIC_WCAM_CLK_R */
@ -83,13 +83,13 @@ static const struct pad_config emmc_disable_pads[] = {
static const struct pad_config nvme_disable_pads[] = { static const struct pad_config nvme_disable_pads[] = {
/* B4 : SSD_PERST_L */ /* B4 : SSD_PERST_L */
PAD_NC(GPP_B4, NONE), PAD_NC_LOCK(GPP_B4, NONE, LOCK_CONFIG),
/* D6 : SSD_CLKREQ_ODL */ /* D6 : SSD_CLKREQ_ODL */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* D11 : EN_PP3300_SSD */ /* D11 : EN_PP3300_SSD */
PAD_NC(GPP_D11, NONE), PAD_NC_LOCK(GPP_D11, NONE, LOCK_CONFIG),
/* E17 : SSD_PLN_L */ /* E17 : SSD_PLN_L */
PAD_NC(GPP_E17, NONE), PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG),
}; };
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)