mb/google/nissa: Lock gpio pins in fw config for nissa variants
There is a new ground rule, variant should honor baseboard lock gpios. Thus, lock the gpio which is locked in baseboard. BUG=b:216671701 TEST=check gpios are locked in pinctrl dump. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ieed2d40b0222d8c8c193e0590131f83a5d96add9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
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@ -19,16 +19,16 @@ static const struct pad_config lte_disable_pads[] = {
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/* D6 : WWAN_EN */
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PAD_NC(GPP_D6, NONE),
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/* F12 : WWAN_RST_L */
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PAD_NC(GPP_F12, NONE),
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PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
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};
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static const struct pad_config wfc_disable_pads[] = {
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/* D3 : WCAM_RST_L */
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PAD_NC(GPP_D3, NONE),
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PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
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/* D15 : EN_PP2800_WCAM_X */
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PAD_NC(GPP_D15, NONE),
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PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
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/* D16 : EN_PP1800_PP1200_WCAM_X */
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PAD_NC(GPP_D16, NONE),
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PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
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/* H22 : WCAM_MCLK_R */
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PAD_NC(GPP_H22, NONE),
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/* R6 : DMIC_WCAM_CLK_R */
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@ -41,9 +41,9 @@ static const struct pad_config sd_disable_pads[] = {
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/* D8 : SD_CLKREQ_ODL */
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PAD_NC(GPP_D8, NONE),
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/* H12 : SD_PERST_L */
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PAD_NC(GPP_H12, NONE),
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PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
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/* H13 : EN_PP3300_SD_X */
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PAD_NC(GPP_H13, NONE),
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PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
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};
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void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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@ -20,32 +20,32 @@ static const struct pad_config lte_disable_pads_nivviks[] = {
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/* D6 : WWAN_EN */
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PAD_NC(GPP_D6, NONE),
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/* F12 : WWAN_RST_L */
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PAD_NC(GPP_F12, NONE),
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PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
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};
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static const struct pad_config lte_disable_pads_nirwen[] = {
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/* E13 : WWAN_EN */
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PAD_NC(GPP_E13, NONE),
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PAD_NC_LOCK(GPP_E13, NONE, LOCK_CONFIG),
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/* F12 : WWAN_RST_L */
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PAD_NC(GPP_F12, NONE),
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PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
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};
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static const struct pad_config sd_disable_pads[] = {
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/* D8 : SD_CLKREQ_ODL */
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PAD_NC(GPP_D8, NONE),
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/* H12 : SD_PERST_L */
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PAD_NC(GPP_H12, NONE),
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PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
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/* H13 : EN_PP3300_SD_X */
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PAD_NC(GPP_H13, NONE),
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PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
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};
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static const struct pad_config wfc_disable_pads[] = {
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/* D3 : WCAM_RST_L */
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PAD_NC(GPP_D3, NONE),
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PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
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/* D15 : EN_PP2800_WCAM_X */
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PAD_NC(GPP_D15, NONE),
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PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
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/* D16 : EN_PP1800_PP1200_WCAM_X */
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PAD_NC(GPP_D16, NONE),
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PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
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/* H22 : WCAM_MCLK_R */
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PAD_NC(GPP_H22, NONE),
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/* R6 : DMIC_WCAM_CLK_R */
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@ -83,13 +83,13 @@ static const struct pad_config emmc_disable_pads[] = {
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static const struct pad_config nvme_disable_pads[] = {
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/* B4 : SSD_PERST_L */
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PAD_NC(GPP_B4, NONE),
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PAD_NC_LOCK(GPP_B4, NONE, LOCK_CONFIG),
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/* D6 : SSD_CLKREQ_ODL */
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PAD_NC(GPP_D6, NONE),
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/* D11 : EN_PP3300_SSD */
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PAD_NC(GPP_D11, NONE),
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PAD_NC_LOCK(GPP_D11, NONE, LOCK_CONFIG),
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/* E17 : SSD_PLN_L */
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PAD_NC(GPP_E17, NONE),
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PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG),
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};
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void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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