nb/i945/early_init.c: Add FSB800 and 1067 to Egress Port Virtual Channel
Values based on vendor bios and suggested by Arthur Heymans for FSB1067. FSB1067: The ratio 1067/800 is proportional to the ratio of EPBAR32(0x2c) bits: 0x1a / 0x14 ~ 1067/800 EPVC1IST: The ratio is also proportional to FSB ratios: 0x9c / 0xf0 ~ 533/800. Change-Id: Ib90e8ea1b82f2fcc3b5c199cace32a7f0aff4b5c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/17198 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -232,8 +232,14 @@ static void i945_setup_egress_port(void)
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/* Egress Port Virtual Channel 1 Configuration */
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reg32 = EPBAR32(0x2c);
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reg32 &= 0xffffff00;
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if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
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if ((MCHBAR32(CLKCFG) & 7) == 0)
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reg32 |= 0x1a; /* 1067MHz */
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}
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if ((MCHBAR32(CLKCFG) & 7) == 1)
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reg32 |= 0x0d; /* 533MHz */
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if ((MCHBAR32(CLKCFG) & 7) == 2)
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reg32 |= 0x14; /* 800MHz */
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if ((MCHBAR32(CLKCFG) & 7) == 3)
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reg32 |= 0x10; /* 667MHz */
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EPBAR32(0x2c) = reg32;
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@ -245,11 +251,23 @@ static void i945_setup_egress_port(void)
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reg32 |= (0x0a << 16);
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EPBAR32(EPVC1RCAP) = reg32;
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if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
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if ((MCHBAR32(CLKCFG) & 7) == 0){ /* 1067MHz */
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EPBAR32(EPVC1IST + 0) = 0x01380138;
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EPBAR32(EPVC1IST + 4) = 0x01380138;
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}
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}
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if ((MCHBAR32(CLKCFG) & 7) == 1) { /* 533MHz */
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EPBAR32(EPVC1IST + 0) = 0x009c009c;
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EPBAR32(EPVC1IST + 4) = 0x009c009c;
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}
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if ((MCHBAR32(CLKCFG) & 7) == 2) { /* 800MHz */
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EPBAR32(EPVC1IST + 0) = 0x00f000f0;
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EPBAR32(EPVC1IST + 4) = 0x00f000f0;
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}
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if ((MCHBAR32(CLKCFG) & 7) == 3) { /* 667MHz */
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EPBAR32(EPVC1IST + 0) = 0x00c000c0;
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EPBAR32(EPVC1IST + 4) = 0x00c000c0;
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