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mainboard/intel/galileo: Enable minimal ACPI tables 

Enable the minimal ACPI tables.  Initialize the FADT header and provide
an empty DSDT.

Testing on Galileo:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file:
   *  Add "select ADD_FSP_PDAT_FILE"
   *  Add "select ADD_FSP_RAW_BIN"
   *  Add "select ADD_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
*  Edit .config file and add the following lines:
   * CONFIG_PAYLOAD_ELF=y
   * CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd"
*  Testing successful if:
   *  Outputs multiple lines of debug serial text

Change-Id: I2e30c8af2994c9f56d9ba4fe6bc35e133b1d2d6b
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13759
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy 2016-02-20 17:53:54 -08:00 committed by Leroy P Leahy
parent d3de85cbcc
commit f7c01aa774
3 changed files with 66 additions and 0 deletions
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1
src/mainboard/intel/galileo/Kconfig
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@ -18,6 +18,7 @@ if BOARD_INTEL_GALILEO
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
select PLATFORM_USES_FSP1_1 select PLATFORM_USES_FSP1_1
select SOC_INTEL_QUARK select SOC_INTEL_QUARK

38
src/mainboard/intel/galileo/acpi_tables.c Normal file
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@ -0,0 +1,38 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015-2016 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <string.h>
#include <soc/acpi.h>
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
{
acpi_header_t *header = &(fadt->header);
/* Initialize the FADT header */
memset((void *) fadt, 0, sizeof(acpi_fadt_t));
memcpy(header->signature, "FACP", 4);
header->length = sizeof(acpi_fadt_t);
header->revision = 5;
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 1;
/* Fill in SoC specific values */
acpi_fill_in_fadt(fadt);
header->checksum = acpi_checksum((void *) fadt, header->length);
}

27
src/mainboard/intel/galileo/dsdt.asl Normal file
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@ -0,0 +1,27 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2015 Google Inc.
* Copyright (C) 2015-2016 Intel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
DefinitionBlock(
"dsdt.aml",
"DSDT",
0x05, // DSDT revision: ACPI v5.0
"Intel", // OEM id
"COREBOOT", // OEM table id
0x20160220 // OEM revision
)
{
}