diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index f848edc40b..12a21ecdb0 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -80,6 +80,9 @@ chip northbridge/intel/haswell
 			# Disable PCIe CLKOUT 1-5 and CLKOUT_XDP
 			register "icc_clock_disable" = "0x013e0000"
 
+			# Route all USB ports to XHCI per default
+			register "xhci_default" = "1"
+
 			device pci 13.0 on end # Smart Sound Audio DSP
 			device pci 14.0 on end # USB3 XHCI
 			device pci 15.0 on end # Serial I/O DMA
diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c
index 7d3c90c0a8..abd93c42e9 100644
--- a/src/mainboard/google/samus/romstage.c
+++ b/src/mainboard/google/samus/romstage.c
@@ -126,6 +126,7 @@ void mainboard_romstage_entry(unsigned long bist)
 		.dimm_channel0_disabled = 2,
 		.dimm_channel1_disabled = 2,
 		.max_ddr3_freq = 1600,
+		.usb_xhci_on_resume = 1,
 		.usb2_ports = {
 			/* Length, Enable, OCn#, Location */
 			{ 0x0080, 1, 0,			/* P0: HOST PORT */