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nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set 

Under certain conditions (training abort) BlockRxDqsLock could
remain set in violation of the BKDG.  Ensure BlockRxDqsLock is
reset to 0 after a lane training abort.

Change-Id: I1a49a24d02b2b7cacae074794ec274a424a9e66b
Reviewed-on: https://review.coreboot.org/14144
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Timothy Pearson 2016-03-20 14:21:53 -05:00
parent a4d8180913
commit f7d4f73053
1 changed files with 6 additions and 0 deletions
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6
src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
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@ -1725,6 +1725,12 @@ static void TrainDQSReceiverEnCyc_D_Fam15(struct MCTStatStruc *pMCTstat,
"Training for receiver %d on DCT %d aborted\n",
__func__, lane, Receiver, dct);
}
/* Restore BlockRxDqsLock setting to normal operation in preparation for retraining */
dword = Get_NB32_index_wait_DCT(dev, dct, index_reg, 0x0d0f0030 | (lane << 8));
dword &= ~(0x1 << 8); /* BlockRxDqsLock = 0 */
Set_NB32_index_wait_DCT(dev, dct, index_reg, 0x0d0f0030 | (lane << 8), dword);
break;
}