soc/intel/apollolake: Add GLK usb2eye configuration override
Now we have usb2eye configuration register in FSPUPD, so we need to add an interface to override usb2eye setting. BRANCH=octopus BUG=NONE TEST=Verified usb2eye custom setting works Change-Id: I5c500964658072eaaf59364242aa928df25d99d1 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com> Reviewed-on: https://review.coreboot.org/c/31060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -593,6 +593,22 @@ static void glk_fsp_silicon_init_params_cb(
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struct soc_intel_apollolake_config *cfg, FSP_S_CONFIG *silconfig)
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{
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#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)
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uint8_t port;
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for (port = 0; port < APOLLOLAKE_USB2_PORT_MAX; port++) {
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if (!cfg->usb2eye[port].Usb20OverrideEn)
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continue;
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silconfig->Usb2AfePehalfbit[port] =
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cfg->usb2eye[port].Usb20PerPortTxPeHalf;
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silconfig->Usb2AfePetxiset[port] =
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cfg->usb2eye[port].Usb20PerPortPeTxiSet;
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silconfig->Usb2AfeTxiset[port] =
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cfg->usb2eye[port].Usb20PerPortTxiSet;
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silconfig->Usb2AfePredeemp[port] =
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cfg->usb2eye[port].Usb20IUsbTxEmphasisEn;
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}
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silconfig->Gmm = 0;
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/* On Geminilake, we need to override the default FSP PCIe de-emphasis
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@ -30,6 +30,7 @@ struct usb2_eye_per_port {
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uint8_t Usb20IUsbTxEmphasisEn;
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uint8_t Usb20PerPortRXISet;
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uint8_t Usb20HsNpreDrvSel;
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uint8_t Usb20OverrideEn;
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};
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#endif /* _SOC_APOLLOLAKE_USB_H_ */
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