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AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base 

The code in rs690 or rs780 is always used with K8 or AMDFAM10
northbridge. Without GFXUMA, both of these set the same static value
indirectly using the variable uma_memory_base.

Make the register setting with immediate value, to remove the obscure
use of variable uma_memory_base.

Change-Id: I5354684457a76e73013b4e34a4538a6d122eee8d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1246
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-07-20 08:24:49 +03:00 committed by Anton Kochkov
parent bbf2496493
commit f803ac4a45
4 changed files with 12 additions and 6 deletions
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3
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -885,9 +885,6 @@ void setup_uma_memory(void)
__func__, uma_memory_size, uma_memory_base); __func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */ /* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x8000000; /* 128M recommended UMA */
uma_memory_base = 0x38000000; /* 1GB system memory supposed */
#endif #endif
} }

3
src/northbridge/amd/amdk8/northbridge.c
View File

@ -879,9 +879,6 @@ void setup_uma_memory(void)
__func__, uma_memory_size, uma_memory_base); __func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */ /* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x8000000; /* 128M recommended UMA */
uma_memory_base = 0x38000000; /* 1GB system memory supposed */
#endif #endif
} }

6
src/southbridge/amd/rs690/cmn.c
View File

@ -316,7 +316,13 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
void rs690_set_tom(device_t nb_dev) void rs690_set_tom(device_t nb_dev)
{ {
/* set TOM */ /* set TOM */
#if CONFIG_GFXUMA
pci_write_config32(nb_dev, 0x90, uma_memory_base); pci_write_config32(nb_dev, 0x90, uma_memory_base);
nbmc_write_index(nb_dev, 0x1e, uma_memory_base); nbmc_write_index(nb_dev, 0x1e, uma_memory_base);
#else
/* 1GB system memory supposed */
pci_write_config32(nb_dev, 0x90, 0x38000000);
nbmc_write_index(nb_dev, 0x1e, 0x38000000);
#endif
} }

6
src/southbridge/amd/rs780/cmn.c
View File

@ -357,8 +357,14 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
void rs780_set_tom(device_t nb_dev) void rs780_set_tom(device_t nb_dev)
{ {
/* set TOM */ /* set TOM */
#if CONFIG_GFXUMA
pci_write_config32(nb_dev, 0x90, uma_memory_base); pci_write_config32(nb_dev, 0x90, uma_memory_base);
//nbmc_write_index(nb_dev, 0x1e, uma_memory_base); //nbmc_write_index(nb_dev, 0x1e, uma_memory_base);
#else
/* 1GB system memory supposed */
pci_write_config32(nb_dev, 0x90, 0x38000000);
//nbmc_write_index(nb_dev, 0x1e, 0x38000000);
#endif
} }
// extract single bit // extract single bit