diff --git a/src/soc/amd/common/block/aoac/aoac.c b/src/soc/amd/common/block/aoac/aoac.c
index c5f161bfcb..0afd2a1f19 100644
--- a/src/soc/amd/common/block/aoac/aoac.c
+++ b/src/soc/amd/common/block/aoac/aoac.c
@@ -24,8 +24,8 @@ void power_off_aoac_device(unsigned int dev)
 bool is_aoac_device_enabled(unsigned int dev)
 {
 	uint8_t byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
-	byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
-	if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
+	byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE);
+	if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE))
 		return true;
 	else
 		return false;
diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h
index ff5d0db169..f4a00c73a7 100644
--- a/src/soc/amd/common/block/include/amdblocks/aoac.h
+++ b/src/soc/amd/common/block/include/amdblocks/aoac.h
@@ -24,7 +24,7 @@
 
 /* Bit definitions for Device D3 State AOACx0000[41...7f; odd byte addresses] */
 #define   FCH_AOAC_PWR_RST_STATE	BIT(0)
-#define   FCH_AOAC_RST_CLK_OK_STATE	BIT(1)
+#define   FCH_AOAC_REF_CLK_OK_STATE	BIT(1)
 #define   FCH_AOAC_RST_B_STATE		BIT(2)
 #define   FCH_AOAC_DEV_OFF_GATING_STATE	BIT(3)
 #define   FCH_AOAC_D3COLD		BIT(4)