From f813b84486228bdb1739ae58853f59aae08d8cc8 Mon Sep 17 00:00:00 2001
From: Philipp Hug <philipp@hug.cx>
Date: Fri, 8 Feb 2019 13:28:33 +0100
Subject: [PATCH] riscv: Use correct argument in a1 when invoking payload

Fix a bug introduced by:
820dcfceb3901dbb00bb90c876e374126ca14e20
riscv: Simplify payload handling

Put fdt into a1 correctly.

Change-Id: I0dea7b88fde9d9a7365cb366917747d8110b9159
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/31287
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/arch/riscv/payload.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
index 8a07ff879f..f3ed5a44a6 100644
--- a/src/arch/riscv/payload.c
+++ b/src/arch/riscv/payload.c
@@ -44,7 +44,7 @@ void run_payload(struct prog *prog, void *fdt, int payload_mode)
 	write_csr(mepc, doit);
 	asm volatile(
 		"mv a0, %0\n\t"
-		"mv a1, %0\n\t"
+		"mv a1, %1\n\t"
 		"mret" ::"r"(hart_id),
 		"r"(fdt)
 		: "a0", "a1");