Documentation/measured_boot.md: fix SRTM/DRTM explanations
Change-Id: If224dc0cf3c0515dbd18daca544c22275e96b459 Ticket: https://ticket.coreboot.org/issues/426 Co-authored-by: Daniel P. Smith <dpsmith@apertussolutions.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68751 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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# Measured Boot
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coreboot measured boot is implemented as Google Verified Boot extension. This
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means in order to use it, vboot needs to be available for your platform. The
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goal of this implementation is to implement an easy to understand and
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transparent measured boot mechanism.
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Measured boot feature was initially implemented as an extension of Google
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Verified Boot. However, the two features were decoupled since then and use of
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measured boot no longer requires enabling vboot.
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In most cases TPM eventlog is initialized during bootblock before TPM gets set
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up, hence digests are not measured into TPM immediately, but are only cached in
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the event log. Later, as part of TPM setup, the cached events are applied onto
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TPM device. The behaviour is different if TPM_MEASURED_BOOT_INIT_BOOTBLOCK
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kconfig is set, which moves TPM initialization into bootblock.
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## SRTM
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A measured-based trust chain is one that begins with an initial entity that
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takes the first measurement, referred to as the "Core Root of Trust for
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Measurement" (CRTM), before control is granted to the measured entity. This
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process of measurement and then passing control is referred to as a transitive
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trust. When the CRTM can only ever be executed once during the power life-cycle
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of the system, it is referred to as a "Static CRTM" (S-CRTM). Thus the trust
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chain constructed from the S-CRTM is referred to as the Static Root of Trust for
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Measurement (SRTM) trust chain. The theory is that as long as a proper
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transitive trust is conducted as more code is allowed to execute, a trustworthy
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record showing the provenance of the executing system may be provided to
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establish the trustworthiness of the system.
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## IBB/CRTM
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The "Initial Boot Block" or "Core Root of Trust for Measurement" is the first
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code block loaded at reset vector and measured by a DRTM solution.
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In case SRTM mode is active, the IBB measures itself before measuring the next
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code block. In coreboot, cbfs files which are part of the IBB are identified
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by a metadata tag. This makes it possible to have platform specific IBB
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measurements without hardcoding them.
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The "Initial Boot Block" (IBB) is a one-time executed code block loaded at the
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reset vector. Under measured boot mode, the IBB measures itself before measuring
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the next code block making it an S-CRTM for the measured boot trust chain, an
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SRTM trust chain. Since the IBB measures itself and executes out of DRAM, it is
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said to have a "Root of Trust" (RoT) that is rooted in software.
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## S-CRTM Hardening
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To address attacks that took advantage of the IBB being self-referential with
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both the "Root of Trust for Verification" (RTV) and "Root of Trust for
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Measurement" (RTM) being rooted in software, hardening was implemented by CPU
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manufactures. This was accomplished by introducing RoT, typically an RTV, to an
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external entity provided by the manufacture that could be validated by the CPU
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at boot. Examples of this are Intel's BootGuard and AMD's Hardware Validated
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Boot (also known as Platform Secure Boot). These solutions work by having the
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IBB invoke the manufacture provided RoT as early as possible, for which the CPU
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has already validated or validates when invoked. The RoT will then validate the
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IBB, thus moving the root for the respective trust chain, typically the
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verification trust chain, into hardware.
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It should be noted that when Intel BootGuard was originally designed, it
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provided a measurement mode that resulted in the ACM (Authenticated Code
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Module) becoming the S-CRTM for the SRTM trust chain. Unfortunately, this was
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never deployed and thus relying on "Root of Trust for Verification" (RTV)
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signature check as the only assertion rooted in hardware.
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## Known Limitations
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At the moment measuring IBB dynamically and FMAP partitions are not possible but
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Also SoCs making use of VBOOT_RETURN_FROM_VERSTAGE are not able to use the
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measured boot extension because of platform constraints.
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## SRTM Mode
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The "Static Root of Trust for Measurement" is the easiest way doing measurements
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by measuring code before it is loaded.
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### Measurements
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SRTM mode measurements are done starting with the IBB as root of trust.
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Only CBFS contents are measured at the moment.
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To construct the coreboot SRTM trust chain, the CBFS files which are part of the
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IBB, are identified by a metadata tag. This makes it possible to have platform
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specific IBB measurements without hard-coding them.
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#### CBFS files (stages, blobs)
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* CBFS data is measured as raw data before decompression happens.
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cbfstool coreboot.rom read -n SI_ME -f /dev/stdout | sha256sum
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```
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## DRTM Mode
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The "Dynamic Root of Trust for Measurement" is realised by platform features
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like Intel TXT or Boot Guard. The features provide a way of loading a signed
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"Authenticated Code Module" aka signed blob. Most of these features are also
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a "Trusted Execution Environment", e.g. Intel TXT.
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## DRTM
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Certain hardware platforms, for example those with Intel TXT or AMD-V, provide
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a mechanism to dynamically execute a CRTM, referred to as the "Dynamic
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CRTM" (D-CRTM), at any point and repeatedly during a single power life-cycle of
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a system. The trust chain constructed by this D-CRTM is referred to as the
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"Dynamic Root of Trust for Measurement" (DRTM) trust chain. On platforms with
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Intel TXT and AMD-V, the D-CRTM is the CPU itself, which is the reason for these
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capabilities being referred to as having a "Root of Trust" (RoT) rooted in
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hardware.
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DRTM gives you the ability of measuring the IBB from a higher Root of Trust
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instead of doing it yourself without any hardware support.
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To provide as an authority assertion and for the DRTM trust chain attestations
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to co-exist with the SRTM trust chain, the TPM provides localities, localities
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1 - 4, which restrict access to a subset of the Platform Configuration
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Registers (PCR), specifically the DRTM PCRs 17 - 22. The mechanism to assert
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authority for access to these localities is platform specific, though the
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intention was for it to be a hardware mechanism. On Intel x86 platforms this is
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controlled through communication between the CPU and the PCH to determine if
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the "Dynamic Launch" instruction, `GETSEC[SENTER]`, was executed and that the
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CPU is in SMX mode. For AMD x86 platforms, this controlled with the APU with a
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similar enforcement that the "Dynamic Launch" instruction, `SKINIT`, was
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executed.
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## Platform Configuration Register
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Normally PCR 0-7 are reserved for firmware usage. In coreboot we use just 4 PCR
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