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Add support for MSI KT4V to flashrom. The KT4V is autodetected and supports 

the KT3 Ultra 2 with "-m msi:kt4v" (but is not autodetected, yet).

Signed-off-by: Sean Nelson <snelson@nmt.edu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sean Nelson 2008-08-19 21:51:39 +00:00 committed by Uwe Hermann
parent 989c17810b
commit f83325ddf9
1 changed files with 47 additions and 0 deletions
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47
util/flashrom/board_enable.c
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@ -547,6 +547,51 @@ static int board_biostar_p4m80_m4(const char *name)
return 0; return 0;
} }
/**
* Winbond W83697HF Super I/O + VIA VT8235 southbridge
*
* Suited for:
* - MSI KT4V and KT4V-L: AMD K7 + VIA KT400 + VT8235
* - MSI KT3 Ultra2: AMD K7 + VIA KT333 + VT8235
*/
static int board_msi_kt4v(const char *name)
{
struct pci_dev *dev;
uint8_t val;
uint32_t val2;
uint16_t port;
dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
if (!dev) {
fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n");
return -1;
}
val = pci_read_byte(dev, 0x59);
val &= 0x0c;
pci_write_byte(dev, 0x59, val);
/* We need the I/O Base Address for this board's flash enable. */
port = pci_read_word(dev, 0x88) & 0xff80;
/* Starting at 'I/O Base + 0x4c' is the GPO Port Output Value.
* We must assert GPO12 for our enable, which is in 0x4d.
*/
val2 = INB(port + 0x4d);
val2 |= 0x10;
OUTB(val2, port + 0x4d);
/* Raise ROM MEMW# line on Winbond W83697 Super I/O. */
w836xx_ext_enter(0x2e);
if (!(wbsio_read(0x2e, 0x24) & 0x02)) { /* Flash ROM enabled? */
/* Enable MEMW# and set ROM size select to max. (4M). */
wbsio_mask(0x2e, 0x24, 0x28, 0x28);
}
w836xx_ext_leave(0x2e);
return 0;
}
/** /**
* We use 2 sets of IDs here, you're free to choose which is which. This * We use 2 sets of IDs here, you're free to choose which is which. This
* is to provide a very high degree of certainty when matching a board on * is to provide a very high degree of certainty when matching a board on
@ -581,6 +626,8 @@ struct board_pciid_enable {
}; };
struct board_pciid_enable board_pciid_enables[] = { struct board_pciid_enable board_pciid_enables[] = {
{0x1106, 0x0571, 0x1462, 0x7120, 0x0000, 0x0000, 0x0000, 0x0000,
"msi", "kt4v", "MSI KT4V", board_msi_kt4v},
{0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028,
NULL, NULL, "ASUS P4B266", ich2_gpio22_raise}, NULL, NULL, "ASUS P4B266", ich2_gpio22_raise},
{0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,