From f84926efca2f871fa557cccee36f0f773ec7190b Mon Sep 17 00:00:00 2001 From: Li-Ta Lo Date: Thu, 4 Nov 2004 18:36:06 +0000 Subject: [PATCH] tell people that the segment descriptors are different for ROMCC and GCC code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/lib/c_start.S | 43 ++++++++++++++++++----------------- src/cpu/x86/16bit/entry16.inc | 8 +++---- src/cpu/x86/32bit/entry32.inc | 9 +++++--- src/cpu/x86/lapic/secondary.S | 2 +- 4 files changed, 33 insertions(+), 29 deletions(-) diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S index 2e397f8847..ccd0127dae 100644 --- a/src/arch/i386/lib/c_start.S +++ b/src/arch/i386/lib/c_start.S @@ -216,7 +216,7 @@ int_hand: popl %ecx popl %edx popl %ebx - popl %ebp /* Ignore saved %esp value */ + popl %ebp /* Ignore saved %esp value */ popl %ebp popl %esi popl %edi @@ -241,49 +241,50 @@ gdb_stub_breakpoint: .globl gdt, gdt_end, gdt_limit, idtarg -gdt_limit = gdt_end - gdt - 1 /* compute the table limit */ +gdt_limit = gdt_end - gdt - 1 /* compute the table limit */ gdtaddr: .word gdt_limit - .long gdt /* we know the offset */ + .long gdt /* we know the offset */ .data + + /* This is the gdt for GCC part of LinuxBIOS. + * It is different from the gdt in ROMCC/ASM part of LinuxBIOS + * which is defined in entry32.inc */ gdt: -// selgdt 0 + /* selgdt 0, unused */ .word 0x0000, 0x0000 /* dummy */ .byte 0x00, 0x00, 0x00, 0x00 -// selgdt 8 + /* selgdt 8, unused */ .word 0x0000, 0x0000 /* dummy */ .byte 0x00, 0x00, 0x00, 0x00 -// selgdt 0x10 -/* flat code segment */ + /* selgdt 0x10, flat code segment */ .word 0xffff, 0x0000 .byte 0x00, 0x9b, 0xcf, 0x00 - -//selgdt 0x18 -/* flat data segment */ + + /* selgdt 0x18, flat data segment */ .word 0xffff, 0x0000 .byte 0x00, 0x93, 0xcf, 0x00 -//selgdt 0x20 + /* selgdt 0x20, unused */ .word 0x0000, 0x0000 /* dummy */ .byte 0x00, 0x00, 0x00, 0x00 #if defined(CONFIG_LEGACY_VGABIOS) && (CONFIG_LEGACY_VGABIOS == 1) - // from monty: - /* 0x00009a00,0000ffffULL, 20h: 16-bit 64k code at 0x00000000 */ - /* 0x00009200,0000ffffULL 28h: 16-bit 64k data at 0x00000000 */ -// selgdt 0x28 -/*16-bit 64k code at 0x00000000 */ - .word 0xffff, 0x0000 - .byte 0, 0x9a, 0, 0 + /* from monty: + * 0x00009a00,0000ffffULL, 20h: 16-bit 64k code at 0x00000000 + * 0x00009200,0000ffffULL 28h: 16-bit 64k data at 0x00000000 */ -// selgdt 0x30 -/*16-bit 64k data at 0x00000000 */ + /* selgdt 0x28, 16-bit 64k code at 0x00000000 */ + .word 0xffff, 0x0000 + .byte 0x00, 0x9a, 0x00, 0x00 + + /* selgdt 0x30, 16-bit 64k data at 0x00000000 */ .word 0xffff, 0x0000 .byte 0, 0x92, 0, 0 -#endif // defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1) +#endif /* defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1) */ gdt_end: idtarg: diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 61726d8ad9..674315fbd2 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -108,10 +108,10 @@ _start: /* Now that we are in protected mode jump to a 32 bit code segment. */ data32 ljmp $ROM_CODE_SEG, $__protected_start -/** The gdt has a 4 Gb code segment at 0x10, and a 4 GB data segment - * at 0x18; these are Linux-compatible. - */ - + /** + * The gdt is defined in entry32.inc, it has a 4 Gb code segment + * at 0x08, and a 4 GB data segment at 0x10; + */ .align 4 .globl gdtptr16 gdtptr16: diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 3d30a3f85f..724aed32eb 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -8,17 +8,20 @@ .align 4 .globl gdtptr + /* This is the gdt for ROMCC/ASM part of LinuxBIOS. + * It is different from the gdt in GCC part of LinuxBIOS + * which is defined in c_start.S */ gdt: gdtptr: .word gdt_end - gdt -1 /* compute the table limit */ .long gdt /* we know the offset */ .word 0 -/* flat code segment */ + /* selgdt 0x08, flat code segment */ .word 0xffff, 0x0000 .byte 0x00, 0x9b, 0xcf, 0x00 - -/* flat data segment */ + + /* selgdt 0x10,flat data segment */ .word 0xffff, 0x0000 .byte 0x00, 0x93, 0xcf, 0x00 diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 5185021c3c..b212f43b38 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -26,7 +26,7 @@ _secondary_start: orl $0x60000001, %eax /* CD, NW, PE = 1 */ movl %eax, %cr0 - ljmpl $0x10, $1f + ljmpl $0x10, $1f 1: .code32 movw $0x18, %ax