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nocturne: Do not set 4 LSB of SX9310 CRTL0 

These bits start the acquisition process. They should only be set by the
driver.

BUG=b:74363445
TEST=compile

Change-Id: I9e10f5570ac82124f7f4b5cc7aaad27da0c578be
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://review.coreboot.org/27265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Gwendal Grignou 2018-06-28 10:09:11 -07:00 committed by Patrick Georgi
parent 6459e427e8
commit f86c3fc017
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/poppy/variants/nocturne/devicetree.cb
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@ -305,7 +305,7 @@ chip soc/intel/skylake
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
register "speed" = "I2C_SPEED_FAST_PLUS"
register "uid" = "0"
register "reg_prox_ctrl0" = "0x1a"
register "reg_prox_ctrl0" = "0x10"
register "reg_prox_ctrl1" = "0x00"
register "reg_prox_ctrl2" = "0x84"
register "reg_prox_ctrl3" = "0x0e"
@ -346,7 +346,7 @@ chip soc/intel/skylake
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D10_IRQ)"
register "speed" = "I2C_SPEED_FAST_PLUS"
register "uid" = "1"
register "reg_prox_ctrl0" = "0x1a"
register "reg_prox_ctrl0" = "0x10"
register "reg_prox_ctrl1" = "0x00"
register "reg_prox_ctrl2" = "0x84"
register "reg_prox_ctrl3" = "0x0e"