soc/intel/common: disable paging if PAGING_IN_CACHE_AS_RAM enabled
When tearing down cache-as-ram disable paging if PAGING_IN_CACHE_AS_RAM is enabled. BUG=b:72728953 Change-Id: I86e8a57a1187876dcbedce9f4f6b05be30aea7c6 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/25732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -22,6 +22,21 @@
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.global chipset_teardown_car
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.global chipset_teardown_car
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chipset_teardown_car:
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chipset_teardown_car:
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#if IS_ENABLED(CONFIG_PAGING_IN_CACHE_AS_RAM)
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/*
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* Since Page table is located in CAR, disable paging before CAR
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* teardown. Also clear CR3 and CR4.PAE.
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*/
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mov %cr0, %eax
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and $(~(CR0_PG)), %eax
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mov %eax, %cr0
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xor %eax, %eax
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mov %eax, %cr3
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mov %cr4, %eax
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and $(~(CR4_PAE)), %eax
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mov %eax, %cr4
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#endif
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/*
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/*
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* Retrieve return address from stack as it will get trashed below if
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* Retrieve return address from stack as it will get trashed below if
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* execution is utilizing the cache-as-ram stack.
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* execution is utilizing the cache-as-ram stack.
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