cpu/x86/smm/module_loader: Fix ASEG loading
This code was never tested with SSE enabled. Now qemu enables it and FX_SAVE encroaches on the save states. Without SSE enabled the handler just happened to be aligned downwards enough to have the save states fit. With SSE enabled that's not the case. The proper fix is to give the code setting up stubs the right base address, which is the same as for the TSEG codepath. Change-Id: I45355efb274c6ddd09a6fb57743d2f6a5b53d209 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69233 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
parent
cc7634fd69
commit
f874fc2717
|
@ -409,6 +409,11 @@ static int append_and_check_region(const struct region smram,
|
||||||
int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
|
int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
|
||||||
struct smm_loader_params *params)
|
struct smm_loader_params *params)
|
||||||
{
|
{
|
||||||
|
if (CONFIG(SMM_ASEG) && (smram_base != SMM_BASE || smram_size != SMM_CODE_SEGMENT_SIZE)) {
|
||||||
|
printk(BIOS_ERR, "SMM base & size are 0x%lx, 0x%zx, but must be 0x%x, 0x%x\n",
|
||||||
|
smram_base, smram_size, SMM_BASE, SMM_CODE_SEGMENT_SIZE);
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
/*
|
/*
|
||||||
* Place in .bss to reduce stack usage.
|
* Place in .bss to reduce stack usage.
|
||||||
* TODO: once CPU_INFO_V2 is used everywhere, use smaller stack for APs and move
|
* TODO: once CPU_INFO_V2 is used everywhere, use smaller stack for APs and move
|
||||||
|
@ -457,18 +462,7 @@ int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
|
||||||
if (append_and_check_region(smram, handler, region_list, "HANDLER"))
|
if (append_and_check_region(smram, handler, region_list, "HANDLER"))
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
uintptr_t stub_segment_base;
|
uintptr_t stub_segment_base = handler_base - SMM_CODE_SEGMENT_SIZE;
|
||||||
|
|
||||||
if (CONFIG(SMM_TSEG)) {
|
|
||||||
stub_segment_base = handler_base - SMM_CODE_SEGMENT_SIZE;
|
|
||||||
} else if (CONFIG(SMM_ASEG)) {
|
|
||||||
stub_segment_base = smram_base;
|
|
||||||
if (smram_base != SMM_BASE || smram_size != SMM_CODE_SEGMENT_SIZE) {
|
|
||||||
printk(BIOS_ERR, "SMM base & size are 0x%lx, 0x%zx, but must be 0x%x, 0x%x\n",
|
|
||||||
smram_base, smram_size, SMM_BASE, SMM_CODE_SEGMENT_SIZE);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!smm_create_map(stub_segment_base, params->num_concurrent_save_states, params)) {
|
if (!smm_create_map(stub_segment_base, params->num_concurrent_save_states, params)) {
|
||||||
printk(BIOS_ERR, "%s: Error creating CPU map\n", __func__);
|
printk(BIOS_ERR, "%s: Error creating CPU map\n", __func__);
|
||||||
|
|
Loading…
Reference in New Issue