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Inagua+children: fix simple copy & paste error in code to reset PCIe slots 

Looking at AssertSlotReset, the comments and all other case's it's
obvious this is a simple copy & paste error where someone just forgot
to change one occurrance of the GPIO nr. Also the AMD Inagua
schematics show that GPIO02 is what they really meant.

Also forward the fix to boards copied from Inagua (AMD South
Station, Union Station, Asrock E350M1).

Change-Id: I6b9a3d473245fa27604b2f148a730290277a88ed
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2445
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Jens Rottmann 2013-02-18 18:56:48 +01:00 committed by Peter Stuge
parent 46cb96bb88
commit f87855ceab
4 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/amd/inagua/BiosCallOuts.c
View File

@ -594,7 +594,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

2
src/mainboard/amd/south_station/BiosCallOuts.c
View File

@ -602,7 +602,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

2
src/mainboard/amd/union_station/BiosCallOuts.c
View File

@ -602,7 +602,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

2
src/mainboard/asrock/e350m1/BiosCallOuts.c
View File

@ -592,7 +592,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;