diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 815768bbca..512137b0b8 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -108,6 +108,16 @@ int southbridge_detect_s3_resume(void);
 
 #define LPC_IO_DEC		0x80 /* IO Decode Ranges Register */
 #define LPC_EN			0x82 /* LPC IF Enables Register */
+#define   CNF2_LPC_EN		(1 << 13) /* 0x4e/0x4f */
+#define   CNF1_LPC_EN		(1 << 12) /* 0x2e/0x2f */
+#define   MC_LPC_EN		(1 << 11) /* 0x62/0x66 */
+#define   KBC_LPC_EN		(1 << 10) /* 0x60/0x64 */
+#define   GAMEH_LPC_EN		(1 << 9)  /* 0x208/0x20f */
+#define   GAMEL_LPC_EN		(1 << 8)  /* 0x200/0x207 */
+#define   FDD_LPC_EN		(1 << 3)  /* LPC_IO_DEC[12] */
+#define   LPT_LPC_EN		(1 << 2)  /* LPC_IO_DEC[9:8] */
+#define   COMB_LPC_EN		(1 << 1)  /* LPC_IO_DEC[6:4] */
+#define   COMA_LPC_EN		(1 << 0)  /* LPC_IO_DEC[2:0] */
 
 /* PCI Configuration Space (D31:F1): IDE */
 #define INTR_LN			0x3c