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Add minimal mainboard support for snow 

This is the minimal set of sources that allow the board to build.
These need to be filled in with actual code. But if we get these in upstream
we can stop working against a WIP patch.

Change-Id: I9347a573bb40761f6a12be3ee8febe3ca4be55a3
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2018
Tested-by: build bot (Jenkins)
This commit is contained in:
Ronald G. Minnich 2012-12-10 16:13:43 -08:00
parent 3600e960b6
commit f89e6b22c0
8 changed files with 424 additions and 0 deletions
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3
src/mainboard/Kconfig
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@ -58,6 +58,8 @@ config VENDOR_GETAC
bool "Getac" bool "Getac"
config VENDOR_GIGABYTE config VENDOR_GIGABYTE
bool "GIGABYTE" bool "GIGABYTE"
config VENDOR_GOOGLE
bool "Google"
config VENDOR_HP config VENDOR_HP
bool "HP" bool "HP"
config VENDOR_IBASE config VENDOR_IBASE
@ -158,6 +160,7 @@ source "src/mainboard/ecs/Kconfig"
source "src/mainboard/emulation/Kconfig" source "src/mainboard/emulation/Kconfig"
source "src/mainboard/getac/Kconfig" source "src/mainboard/getac/Kconfig"
source "src/mainboard/gigabyte/Kconfig" source "src/mainboard/gigabyte/Kconfig"
source "src/mainboard/google/Kconfig"
source "src/mainboard/hp/Kconfig" source "src/mainboard/hp/Kconfig"
source "src/mainboard/ibase/Kconfig" source "src/mainboard/ibase/Kconfig"
source "src/mainboard/ibm/Kconfig" source "src/mainboard/ibm/Kconfig"

35
src/mainboard/google/Kconfig Normal file
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@ -0,0 +1,35 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The ChromiumOS Authors
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if VENDOR_GOOGLE
choice
prompt "Mainboard model"
config BOARD_GOOGLE_SNOW
bool "Snow"
endchoice
source "src/mainboard/google/snow/Kconfig"
config MAINBOARD_VENDOR
string
default "Google"
endif # VENDOR_GOOGLE

180
src/mainboard/google/snow/Kconfig Normal file
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@ -0,0 +1,180 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if BOARD_GOOGLE_SNOW
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_ARMV7
select CPU_SAMSUNG_EXYNOS5
select HAVE_UART_MEMORY_MAPPED
select CONSOLE_SERIAL_NONSTANDARD_MEM # enable serial debugging
# select EC_GOOGLE_CHROMEEC
select BOARD_ROMSIZE_KB_4096
select DRIVER_MAXIM_77686
# select HAVE_ACPI_TABLES
# select MMCONF_SUPPORT
# select CHROMEOS
config MAINBOARD_DIR
string
default google/snow
config MAINBOARD_PART_NUMBER
string
default "SNOW"
#config MMCONF_BASE_ADDRESS
# hex
# default 0xf0000000
#config IRQ_SLOT_COUNT
# int
# default 18
config MAX_CPUS
int
default 2
config MAINBOARD_VENDOR
string
default "Samsung"
# SPL (second-phase loader) stuff
config SPL_TEXT_BASE
hex
default 0x02023400
help
Location of SPL. Default location is within iRAM region.
# FIXME: increased "SPL" size to get around build issues
#config SPL_MAX_SIZE
# hex "SPL executable max size"
# default 0x3800
# help
# Max size of SPL. Default is 14KB
config SPL_MAX_SIZE
hex
default 0x8000
help
Max size of SPL. Let's say 32KB for now...
config DRAM_SIZE_MB
int
default 2048
config NR_DRAM_BANKS
int
default 1
choice
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL_NONSTANDARD_MEM
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_NONSTANDARD_MEM
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2
default 0x12c30000 if CONSOLE_SERIAL_UART3
help
Map the UART names to the respective MMIO address.
#################################################################
# stuff from smdk5250.h #
# FIXME: can we move some of these to exynos5250's Kconfig? #
#################################################################
config SYS_I2C_SPEED
int
default 100000
config SYS_I2C_SLAVE
hex
default 0x0
config I2C_MULTI_BUS
bool
default y
#config HARD_I2C
# bool
# default y
#CMD_I2C
#I2C_EDID
#DRIVER_S3C24X0_I2C
config VDD_ARM_MV
int
default 1300 #1.3V
config VDD_INT_UV
int
default 1012500 # 1.0125v
config VDD_MIF_MV
int
default 1000 # 1.0v
config VDD_G3D_MV
int
default 1200 # 1.2v
config VDD_LDO2_MV
int
default 1500 # 1.5v
config VDD_LDO3_MV
int
default 1800 # 1.8v
config VDD_LDO5_MV
int
default 1800 # 1.8v
config VDD_LDO10_MV
int
default 1800 # 1.8v
######### smdk5250.h ########
endif # BOARD_GOOGLE_SNOW

36
src/mainboard/google/snow/Makefile.inc Normal file
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@ -0,0 +1,36 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#romstage-y += romstage.c
# ramstage-y += ec.c
# FIXME: smdk5250_spl and mainboard.c are a mess. In the long
# run we'll want to replace low-level code that calls mainboard code
# with mainboard code that calls low-level code with appropriate
# parameters. Grep around for spl_get_machine_params for examples.
romstage-y += smdk5250_spl.c
ramstage-y += smdk5250_spl.c
#ramstage-y += mainboard.c
# romstage-$(CONFIG_CHROMEOS) += chromeos.c
# FIXME: we should do something similar to x86 platforms for Snow SPDs
SRC_ROOT = $(src)/mainboard/google/snow

26
src/mainboard/google/snow/devicetree.cb Normal file
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@ -0,0 +1,26 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
# FIXME: this is just a stub for now
chip cpu/samsung/exynos5250
chip drivers/generic/generic # I2C0 controller
device i2c 6 on end # ?
device i2c 9 on end # ?
end
end

34
src/mainboard/google/snow/mainboard.c Normal file
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@ -0,0 +1,34 @@
/*
* Copyright (C) 2012 The ChromeOS Authors
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <device/device.h>
// mainboard_enable is executed as first thing after
// enumerate_buses().
static void mainboard_enable(device_t dev)
{
//dev->ops->init = mainboard_init;
}
struct chip_operations mainboard_ops = {
.name = "Samsung/Google ARM ChromeBook",
.enable_dev = mainboard_enable,
};

32
src/mainboard/google/snow/romstage.c Normal file
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@ -0,0 +1,32 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <system.h>
#include <cache.h>
static void mmu_setup(void)
{
dram_bank_mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024);
}
void main(unsigned long bist)
{
mmu_setup();
}

78
src/mainboard/google/snow/smdk5250_spl.c Normal file
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@ -0,0 +1,78 @@
/*
* Copyright (c) 2012 The Chromium OS Authors.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <arch/gpio.h>
#include <cpu/samsung/exynos5-common/spl.h>
#include <cpu/samsung/exynos5250/gpio.h>
#define SIGNATURE 0xdeadbeef
/* Parameters of early board initialization in SPL */
static struct spl_machine_param machine_param
__attribute__((section(".machine_param"))) = {
.signature = SIGNATURE,
.version = 1,
.params = "vmubfasirMw",
.size = sizeof(machine_param),
.mem_iv_size = 0x1f,
.mem_type = DDR_MODE_DDR3,
/*
* Set uboot_size to 0x100000 bytes.
*
* This is an overly conservative value chosen to accommodate all
* possible U-Boot image. You are advised to set this value to a
* smaller realistic size via scripts that modifies the .machine_param
* section of output U-Boot image.
*/
.uboot_size = 0x100000,
.boot_source = BOOT_MODE_OM,
.frequency_mhz = 800,
.arm_freq_mhz = 1700,
.serial_base = 0x12c30000,
.i2c_base = 0x12c60000,
.board_rev_gpios = GPIO_D00 | (GPIO_D01 << 16),
.mem_manuf = MEM_MANUF_SAMSUNG,
.bad_wake_gpio = GPIO_Y10,
};
struct spl_machine_param *spl_get_machine_params(void)
{
if (machine_param.signature != SIGNATURE) {
/* TODO: Call panic() here */
while (1)
;
}
return &machine_param;
}
int board_wakeup_permitted(void)
{
struct spl_machine_param *param = spl_get_machine_params();
const int gpio = param->bad_wake_gpio;
int is_bad_wake;
/* We're a bad wakeup if the gpio was defined and was high */
is_bad_wake = ((gpio != -1) && gpio_get_value(gpio));
return !is_bad_wake;
}