diff --git a/src/mainboard/lenovo/t440p/cmos.default b/src/mainboard/lenovo/t440p/cmos.default
index 0949e7b13c..bb8626d48b 100644
--- a/src/mainboard/lenovo/t440p/cmos.default
+++ b/src/mainboard/lenovo/t440p/cmos.default
@@ -10,4 +10,5 @@ f1_to_f12_as_primary=Enable
 sticky_fn=Disable
 trackpoint=Enable
 backlight=Keyboard
+enable_dual_graphics=Disable
 usb_always_on=Disable
diff --git a/src/mainboard/lenovo/t440p/cmos.layout b/src/mainboard/lenovo/t440p/cmos.layout
index f65933a715..9c09104d55 100644
--- a/src/mainboard/lenovo/t440p/cmos.layout
+++ b/src/mainboard/lenovo/t440p/cmos.layout
@@ -69,7 +69,7 @@ entries
 424          1       e       1        f1_to_f12_as_primary
 
 # coreboot config options: northbridge
-#435         2        e       12       hybrid_graphics_mode
+435         1        e       1        enable_dual_graphics
 #437        3        r       0        unused
 440          8       h       0        volume
 
@@ -108,9 +108,6 @@ enumerations
 10    1     Keyboard
 #10    2     Thinklight only
 10    3     None
-#12    0     Integrated Only
-#12    1     Discrete Only
-#12    2     Dual Graphics
 13    0     Disable
 13    1     AC and battery
 13    2     AC only
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index c8c630bfde..283a52b460 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -22,6 +22,9 @@
 #include <northbridge/intel/haswell/pei_data.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/lynxpoint/pch.h>
+#include <option.h>
+#include <ec/lenovo/pmh7/pmh7.h>
+#include <device/pci_ops.h>
 
 static const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_16(D31IR, DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQA)),
@@ -100,4 +103,21 @@ void mainboard_romstage_entry(void)
 	};
 
 	romstage_common(&romstage_params);
+
+	u8 enable_peg;
+	if (get_option(&enable_peg, "enable_dual_graphics") != CB_SUCCESS)
+		enable_peg = 0;
+
+	bool power_en = pmh7_dgpu_power_state();
+
+	if (enable_peg != power_en)
+		pmh7_dgpu_power_enable(!power_en);
+
+	if (!enable_peg) {
+		// Hide disabled dGPU device
+		u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
+		reg32 &= ~DEVEN_D1F0EN;
+
+		pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
+	}
 }