soc/amd/common/block/psp: Add psp_set_tpm_irq_gpio
The PSP currently uses a hard coded GPIO for the TPM IRQ. Not all board versions use the same GPIO. This method allows the mainboard to pass in the correct GPIO. BUG=b:241824257 TEST=Boot guybrush and verify PSP message prints Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ie05d095d7f141d6a526d08fbf25eb2652e96aa49 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66614 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@ -75,4 +75,7 @@ void psp_notify_sx_info(u8 sleep_type);
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int psp_load_named_blob(enum psp_blob_type type, const char *name);
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int psp_load_named_blob(enum psp_blob_type type, const char *name);
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/* Sets the GPIO used for the TPM IRQ */
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void psp_set_tpm_irq_gpio(unsigned int gpio);
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#endif /* AMD_BLOCK_PSP_H */
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#endif /* AMD_BLOCK_PSP_H */
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@ -23,6 +23,7 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2),y)
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romstage-y += psp_gen2.c
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romstage-y += psp_gen2.c
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ramstage-y += psp_gen2.c
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ramstage-y += psp_gen2.c
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ramstage-$(CONFIG_PSP_PLATFORM_SECURE_BOOT) += psb.c
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ramstage-$(CONFIG_PSP_PLATFORM_SECURE_BOOT) += psb.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) += tpm.c
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smm-y += psp_gen2.c
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smm-y += psp_gen2.c
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smm-y += psp_smm_gen2.c
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smm-y += psp_smm_gen2.c
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@ -20,6 +20,7 @@
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#define MBOX_BIOS_CMD_PSB_AUTO_FUSING 0x21
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#define MBOX_BIOS_CMD_PSB_AUTO_FUSING 0x21
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#define MBOX_BIOS_CMD_SET_SPL_FUSE 0x2d
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#define MBOX_BIOS_CMD_SET_SPL_FUSE 0x2d
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#define MBOX_BIOS_CMD_QUERY_SPL_FUSE 0x47
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#define MBOX_BIOS_CMD_QUERY_SPL_FUSE 0x47
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#define MBOX_BIOS_CMD_I2C_TPM_ARBITRATION 0x64
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#define MBOX_BIOS_CMD_ABORT 0xfe
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#define MBOX_BIOS_CMD_ABORT 0xfe
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/* x86 to PSP commands, v1-only */
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/* x86 to PSP commands, v1-only */
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@ -81,6 +82,23 @@ struct mbox_cmd_late_spl_buffer {
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uint32_t spl_value;
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uint32_t spl_value;
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} __attribute__((packed, aligned(32)));
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} __attribute__((packed, aligned(32)));
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struct dtpm_config {
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uint32_t gpio;
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} __packed;
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enum dtpm_request_type {
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DTPM_REQUEST_ACQUIRE, /* Acquire I2C bus */
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DTPM_REQUEST_RELEASE, /* Release I2C bus */
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DTPM_REQUEST_CONFIG, /* Provide DTPM info */
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DTPM_REQUEST_MAX,
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};
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struct mbox_cmd_dtpm_config_buffer {
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struct mbox_buffer_header header;
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uint32_t request_type;
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struct dtpm_config config;
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} __packed __aligned(32);
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#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */
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#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */
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#define PSP_CMD_TIMEOUT 1000 /* 1 second */
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#define PSP_CMD_TIMEOUT 1000 /* 1 second */
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@ -0,0 +1,26 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/psp.h>
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#include <console/console.h>
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#include <types.h>
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#include "psp_def.h"
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void psp_set_tpm_irq_gpio(unsigned int gpio)
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{
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int cmd_status;
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struct mbox_cmd_dtpm_config_buffer buffer = {
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.header = {
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.size = sizeof(buffer)
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},
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.request_type = DTPM_REQUEST_CONFIG,
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.config = {
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.gpio = gpio
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}
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};
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printk(BIOS_DEBUG, "PSP: Setting TPM GPIO to %u...", gpio);
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cmd_status = send_psp_command(MBOX_BIOS_CMD_I2C_TPM_ARBITRATION, &buffer);
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psp_print_cmd_status(cmd_status, &buffer.header);
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}
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