mainboard: Use read_int_option()
Change-Id: I9273b90b6a21b8f52fa42d9ff03a9b56eec9fcbf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -603,7 +603,7 @@ static void prepare_for_hwm_ec_sequence(uint8_t write_only, uint8_t *value)
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void sch5545_ec_hwm_init(void *unused)
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{
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uint8_t val = 0, val_2fc, chassis_type, fan_speed_full = 0;
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uint8_t val = 0, val_2fc, chassis_type;
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printk(BIOS_DEBUG, "%s\n", __func__);
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sch5545_emi_init(0x2e);
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@ -656,9 +656,12 @@ void sch5545_ec_hwm_init(void *unused)
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ec_read_write_reg(EC_HWM_LDN, 0x02fc, &val_2fc, WRITE_OP);
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if (get_option(&fan_speed_full, "fan_full_speed") != CB_SUCCESS)
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int fan_speed_full = get_int_option("fan_full_speed", -1);
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if (fan_speed_full < 0) {
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fan_speed_full = 0;
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printk(BIOS_INFO, "fan_full_speed CMOS option not found. "
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"Fans will be set up for automatic control\n");
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}
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if (fan_speed_full) {
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ec_read_write_reg(EC_HWM_LDN, 0x0080, &val, READ_OP);
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@ -136,11 +136,10 @@ static void mainboard_init(void *chip_info)
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struct device *dev;
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for (i = 1; i <= 3; i++) {
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int ethernet_disable = 0;
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char cmos_option_name[] = "ethernetx";
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snprintf(cmos_option_name, sizeof(cmos_option_name),
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"ethernet%01d", i);
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get_option(ðernet_disable, cmos_option_name);
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int ethernet_disable = get_int_option(cmos_option_name, 0);
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if (!ethernet_disable)
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continue;
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printk(BIOS_DEBUG, "Disabling Ethernet NIC #%d\n", i);
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@ -38,7 +38,8 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
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memory_params->DqPinsInterleaved = true;
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get_option(&memory_params->HyperThreading, "hyper_threading");
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const uint8_t ht = get_int_option("hyper_threading", memory_params->HyperThreading);
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memory_params->HyperThreading = ht;
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variant_memory_init_params(mupd);
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}
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@ -13,9 +13,8 @@ void variant_memory_init_params(FSPM_UPD *const mupd)
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unsigned int i;
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for (i = 0; i < 3; ++i) {
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u8 eth_enable = 1;
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nvram_var[sizeof(nvram_var) - 2] = '1' + i;
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get_option(ð_enable, nvram_var);
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u8 eth_enable = get_int_option(nvram_var, 1);
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if (!eth_enable) {
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printk(BIOS_INFO, "Disabling ethernet%u.\n", 1 + i);
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mupd->FspmConfig.PcieRpEnableMask &= ~(1 << (i + 8));
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@ -149,17 +149,16 @@ static void mainboard_enable(struct device *dev)
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/* Install custom int15 handler for VGA OPROM */
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mainboard_interrupt_handlers(0x15, &int15_handler);
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#endif
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unsigned int disable = 0;
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if ((get_option(&disable, "ethernet1") == CB_SUCCESS) && disable) {
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unsigned int disable = get_int_option("ethernet1", 0);
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if (disable) {
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struct device *nic = pcidev_on_root(0x1c, 2);
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if (nic) {
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printk(BIOS_DEBUG, "DISABLE FIRST NIC!\n");
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nic->enabled = 0;
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}
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}
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disable = 0;
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if ((get_option(&disable, "ethernet2") == CB_SUCCESS) && disable) {
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disable = get_int_option("ethernet2", 0);
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if (disable) {
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struct device *nic = pcidev_on_root(0x1c, 3);
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if (nic) {
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printk(BIOS_DEBUG, "DISABLE SECOND NIC!\n");
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@ -33,9 +33,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
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void mainboard_early_init(int s3resume)
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{
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u8 enable_peg;
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if (get_option(&enable_peg, "enable_dual_graphics") != CB_SUCCESS)
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enable_peg = 0;
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u8 enable_peg = get_int_option("enable_dual_graphics", 0);
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bool power_en = pmh7_dgpu_power_state();
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@ -22,9 +22,7 @@ void mainboard_config_rcba(void)
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void mb_late_romstage_setup(void)
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{
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u8 enable_peg;
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if (get_option(&enable_peg, "enable_dual_graphics") != CB_SUCCESS)
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enable_peg = 0;
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u8 enable_peg = get_int_option("enable_dual_graphics", 0);
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bool power_en = pmh7_dgpu_power_state();
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@ -9,7 +9,6 @@
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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uint8_t vtd = 1;
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const struct cnl_mb_cfg cfg = {
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.spd = {
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[0] = { READ_SMBUS, { 0x50 << 1 } },
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@ -25,9 +24,10 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
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memupd->FspmConfig.EccSupport = 1;
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memupd->FspmConfig.UserBd = BOARD_TYPE_MOBILE;
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get_option(&vtd, "vtd");
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const uint8_t vtd = get_int_option("vtd", 1);
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memupd->FspmTestConfig.VtdDisable = !vtd;
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get_option(&memupd->FspmConfig.HyperThreading, "hyper_threading");
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const uint8_t ht = get_int_option("hyper_threading", memupd->FspmConfig.HyperThreading);
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memupd->FspmConfig.HyperThreading = ht;
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variant_romstage_params(memupd);
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@ -7,9 +7,8 @@
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void variant_romstage_params(FSPM_UPD *const mupd)
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{
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uint8_t eth_enable = 1;
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const uint8_t eth_enable = get_int_option("ethernet1", 1);
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get_option(ð_enable, "ethernet1");
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if (!eth_enable) {
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printk(BIOS_DEBUG, "Disabling ethernet1.\n");
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mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 5);
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@ -30,9 +30,7 @@ static void hide_ast2400(void)
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static void mainboard_enable(struct device *dev)
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{
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u8 hide = 0;
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if (get_option(&hide, "hide_ast2400") == CB_SUCCESS && hide)
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if (get_int_option("hide_ast2400", false))
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hide_ast2400();
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}
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