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mb/google/puff/var/dooly: Add gpio_keys for mic mute switch 

UI monitors this input event and sends global mic mute command to CRAS
when the physical switch is toggled.

BUG=b:184593945
BRANCH=puff
TEST=build image and verify with evtest on DUT.
Apply crrev.com/c/2870806 with chrome cmdline flag and verify global
mute is triggered.
Verify sequences of switch toggle and suspend/resume.

Change-Id: Id89947885fdd96c5b5d598bda6db127daf298dc3
Signed-off-by: Ben Zhang <benzh@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Ben Zhang 2021-05-16 08:44:47 -04:00 committed by Tim Wawrzynczak
parent 3246c5803c
commit f8b0eb8f3e
2 changed files with 12 additions and 1 deletions
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2
src/mainboard/google/hatch/variants/dooly/gpio.c
View File

@ -42,7 +42,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C19, NONE), PAD_NC(GPP_C19, NONE),
/* D16 : DMIC_ON_OFF MIC_SWITCH_L */ /* D16 : DMIC_ON_OFF MIC_SWITCH_L */
PAD_CFG_GPI(GPP_D16, NONE, DEEP), PAD_CFG_GPI_GPIO_DRIVER(GPP_D16, NONE, DEEP),
/* E2 : EN_PP_MST_OD */ /* E2 : EN_PP_MST_OD */
PAD_CFG_GPO(GPP_E2, 1, DEEP), PAD_CFG_GPO(GPP_E2, 1, DEEP),

11
src/mainboard/google/hatch/variants/dooly/overridetree.cb
View File

@ -348,6 +348,17 @@ chip soc/intel/cannonlake
register "property_list[0].integer" = "1" register "property_list[0].integer" = "1"
device i2c 1a on end device i2c 1a on end
end end
chip drivers/generic/gpio_keys
register "name" = ""MUTE""
register "label" = ""mic_mute_switch""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_D16)"
register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED"
register "key.dev_name" = ""MMSW""
register "key.linux_code" = "SW_MUTE_DEVICE"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""mic_mute_switch_key""
device generic 0 on end
end
end #I2C #4 end #I2C #4
device pci 1a.0 on end # eMMC device pci 1a.0 on end # eMMC
device pci 1d.2 on # PCI Express Port 11 (X2 NVMe) device pci 1d.2 on # PCI Express Port 11 (X2 NVMe)