Revert "CBMEM: Always have early initialisation"
This reverts commit de1fe7f655
.
While things appeared to work, there were actually invalid references
to CAR storage after CAR was torn down on boards without
EARLY_CBMEM_INIT. It was discussed use of CAR_GLOBAL should be
restricted to boards that handle CAR migration properly.
Change-Id: I9969d2ea79c334a7f95a0dbb7c78065720e6ccae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3968
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
parent
cf18c856aa
commit
f8bf5a10c5
12
src/Kconfig
12
src/Kconfig
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@ -170,9 +170,19 @@ config INCLUDE_CONFIG_FILE
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config 0x8d740 raw 3324
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config 0x8d740 raw 3324
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(empty) 0x8e480 null 3610440
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(empty) 0x8e480 null 3610440
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config EARLY_CBMEM_INIT
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bool
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default n
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help
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Make coreboot initialize the CBMEM structures while running in ROM
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stage. This is useful when the ROM stage wants to communicate
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some, for instance, execution timestamps. It needs support in
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romstage.c and should be enabled by the board's Kconfig.
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config DYNAMIC_CBMEM
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config DYNAMIC_CBMEM
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bool "The CBMEM space is dynamically grown."
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bool "The CBMEM space is dynamically grown."
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default n
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default n
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select EARLY_CBMEM_INIT
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help
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help
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Instead of reserving a static amount of CBMEM space the CBMEM
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Instead of reserving a static amount of CBMEM space the CBMEM
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area grows dynamically. CBMEM can be used both in romstage (after
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area grows dynamically. CBMEM can be used both in romstage (after
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@ -180,7 +190,7 @@ config DYNAMIC_CBMEM
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config COLLECT_TIMESTAMPS
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config COLLECT_TIMESTAMPS
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bool "Create a table of timestamps collected during boot"
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bool "Create a table of timestamps collected during boot"
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default n
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depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM)
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help
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help
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Make coreboot create a table of timer-ID/timer-value pairs to
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Make coreboot create a table of timer-ID/timer-value pairs to
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allow measuring time spent at different phases of the boot process.
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allow measuring time spent at different phases of the boot process.
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@ -1,4 +1,5 @@
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romstage-y += cbmem.c
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romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c
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romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
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ramstage-y += boot.c
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ramstage-y += boot.c
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ramstage-$(CONFIG_MULTIBOOT) += multiboot.c
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ramstage-$(CONFIG_MULTIBOOT) += multiboot.c
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@ -274,6 +274,7 @@ config CONSOLE_NE2K_IO_PORT
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boundary, qemu needs broader align)
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boundary, qemu needs broader align)
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config CONSOLE_CBMEM
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config CONSOLE_CBMEM
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depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM)
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bool "Send console output to a CBMEM buffer"
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bool "Send console output to a CBMEM buffer"
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default n
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default n
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help
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help
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@ -1 +1,2 @@
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romstage-$(CONFIG_CACHE_AS_RAM) += car.c
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romstage-$(CONFIG_EARLY_CBMEM_INIT) += car.c
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romstage-$(CONFIG_HAVE_ACPI_RESUME) += car.c
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@ -50,7 +50,7 @@ romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
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romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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romstage-$(CONFIG_SPKMODEM) += spkmodem.c
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romstage-$(CONFIG_SPKMODEM) += spkmodem.c
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ifeq ($(CONFIG_CACHE_AS_RAM),y)
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ifeq ($(CONFIG_EARLY_CBMEM_INIT),y)
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romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
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romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
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romstage-$(CONFIG_USBDEBUG) += usbdebug.c
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romstage-$(CONFIG_USBDEBUG) += usbdebug.c
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@ -108,7 +108,8 @@ ramstage-y += dynamic_cbmem.c
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romstage-y += dynamic_cbmem.c
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romstage-y += dynamic_cbmem.c
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else
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else
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ramstage-y += cbmem.c
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ramstage-y += cbmem.c
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romstage-$(CONFIG_CACHE_AS_RAM) += cbmem.c
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romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c
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romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
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endif # CONFIG_DYNAMIC_CBMEM
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endif # CONFIG_DYNAMIC_CBMEM
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ramstage-y += cbmem_info.c
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ramstage-y += cbmem_info.c
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@ -95,6 +95,7 @@ void cbmem_late_set_table(uint64_t base, uint64_t size)
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* - suspend/resume backup memory
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* - suspend/resume backup memory
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*/
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*/
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#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
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static void cbmem_init(void)
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static void cbmem_init(void)
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{
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{
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uint64_t baseaddr, size;
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uint64_t baseaddr, size;
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@ -119,6 +120,7 @@ static void cbmem_init(void)
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.size = size - CBMEM_TOC_RESERVED
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.size = size - CBMEM_TOC_RESERVED
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};
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};
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}
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}
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#endif
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int cbmem_reinit(void)
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int cbmem_reinit(void)
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{
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{
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@ -218,6 +220,7 @@ void *cbmem_find(u32 id)
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return (void *)NULL;
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return (void *)NULL;
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}
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}
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#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
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/* Returns True if it was not initialized before. */
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/* Returns True if it was not initialized before. */
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int cbmem_initialize(void)
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int cbmem_initialize(void)
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{
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{
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@ -241,6 +244,7 @@ int cbmem_initialize(void)
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return rv;
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return rv;
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}
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}
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#endif
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#ifndef __PRE_RAM__
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#ifndef __PRE_RAM__
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static void init_cbmem_post_device(void *unused)
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static void init_cbmem_post_device(void *unused)
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@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select BOARD_ROMSIZE_KB_256
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select BOARD_ROMSIZE_KB_256
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select EARLY_CBMEM_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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# select HAVE_ACPI_RESUME
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# select HAVE_ACPI_RESUME
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select BOARD_ROMSIZE_KB_256
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select BOARD_ROMSIZE_KB_256
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select EARLY_CBMEM_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select GFXUMA
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select GFXUMA
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select CHROMEOS
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select CHROMEOS
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select EARLY_CBMEM_INIT
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# Workaround for EC/KBC IRQ1.
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# Workaround for EC/KBC IRQ1.
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select SERIRQ_CONTINUOUS_MODE
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select SERIRQ_CONTINUOUS_MODE
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@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select CHROMEOS
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select CHROMEOS
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select SERIRQ_CONTINUOUS_MODE
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select SERIRQ_CONTINUOUS_MODE
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select EARLY_CBMEM_INIT
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select MARK_GRAPHICS_MEM_WRCOMB
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select MARK_GRAPHICS_MEM_WRCOMB
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select GFXUMA
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select GFXUMA
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select CHROMEOS
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select CHROMEOS
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select EARLY_CBMEM_INIT
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# Workaround for EC/KBC IRQ1.
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# Workaround for EC/KBC IRQ1.
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select SERIRQ_CONTINUOUS_MODE
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select SERIRQ_CONTINUOUS_MODE
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@ -296,7 +296,11 @@ void main(unsigned long bist)
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post_code(0x3e);
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post_code(0x3e);
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MCHBAR16(SSKPD) = 0xCAFE;
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MCHBAR16(SSKPD) = 0xCAFE;
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#if CONFIG_EARLY_CBMEM_INIT
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cbmem_was_initted = !cbmem_initialize();
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cbmem_was_initted = !cbmem_initialize();
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#else
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cbmem_was_initted = cbmem_reinit();
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#endif
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#if CONFIG_HAVE_ACPI_RESUME
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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/* If there is no high memory area, we didn't boot before, so
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select GFXUMA
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select GFXUMA
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#select CHROMEOS
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#select CHROMEOS
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select EARLY_CBMEM_INIT
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select GFXUMA
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select GFXUMA
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select EARLY_CBMEM_INIT
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select ENABLE_VMX
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select ENABLE_VMX
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select HAVE_MRC
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select HAVE_MRC
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select CHANNEL_XOR_RANDOMIZATION
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select CHANNEL_XOR_RANDOMIZATION
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select EARLY_CBMEM_INIT
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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default lenovo/t60
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default lenovo/t60
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select USE_OPTION_TABLE
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select USE_OPTION_TABLE
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select EARLY_CBMEM_INIT
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SUPERIO_SMSC_MEC1308
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select SUPERIO_SMSC_MEC1308
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select DRIVERS_GENERIC_IOAPIC
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select DRIVERS_GENERIC_IOAPIC
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select EARLY_CBMEM_INIT
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select HAVE_MRC
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select HAVE_MRC
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SUPERIO_ITE_IT8772F
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select SUPERIO_ITE_IT8772F
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select EARLY_CBMEM_INIT
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select HAVE_MRC
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select HAVE_MRC
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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@ -94,7 +94,9 @@ void main(unsigned long bist)
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print_debug("We passed RAM verify\n");
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print_debug("We passed RAM verify\n");
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/* We got RAM working, now we can write the timestamps to RAM */
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/* We got RAM working, now we can write the timestamps to RAM */
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#if CONFIG_EARLY_CBMEM_INIT
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cbmem_initialize();
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cbmem_initialize();
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#endif
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timestamp_add_now(TS_END_ROMSTAGE);
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timestamp_add_now(TS_END_ROMSTAGE);
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/* FIXME: See if this is needed or take this out please */
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/* FIXME: See if this is needed or take this out please */
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/* Disable Memcard and SDIO */
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/* Disable Memcard and SDIO */
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@ -58,6 +58,7 @@ static void save_mrc_data(struct pei_data *pei_data)
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{
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{
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u16 c1, c2, checksum;
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u16 c1, c2, checksum;
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#if CONFIG_EARLY_CBMEM_INIT
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struct mrc_data_container *mrcdata;
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struct mrc_data_container *mrcdata;
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int output_len = ALIGN(pei_data->mrc_output_len, 16);
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int output_len = ALIGN(pei_data->mrc_output_len, 16);
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@ -83,6 +84,7 @@ static void save_mrc_data(struct pei_data *pei_data)
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mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data,
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mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data,
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mrcdata->mrc_data_size);
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mrcdata->mrc_data_size);
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#endif
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/* Save the MRC seed values to CMOS */
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/* Save the MRC seed values to CMOS */
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cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);
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cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);
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