arch/x86: Remove spinlocks inside CAR

This was only used with amdfam10h-15h, where cache
coherency between nodes was supposed to be guaranteed
with this code. We could want a cleaner and more generic
approach for this, possibly utilising .data sections.

Change-Id: I00da5c2b0570c26f2e3bb464274485cc2c08c8f0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2019-08-19 16:14:15 +03:00
parent 9bb16cd9c5
commit f8dc4bc022
3 changed files with 6 additions and 50 deletions

View File

@ -527,22 +527,6 @@ config RESUME_PATH_SAME_AS_BOOT
same path as a regular boot. e.g. an x86 system runs from the
reset vector at 0xfffffff0 on both resume and warm/cold boot.
config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
bool
default n
config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
bool
default n
help
This should be enabled on certain plaforms, such as the AMD
SR565x, that cannot handle concurrent CBFS accesses from
multiple APs during early startup.
config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
bool
default n
config NO_MONOTONIC_TIMER
def_bool n

View File

@ -14,11 +14,6 @@
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
#if !defined(__PRE_RAM__) \
|| CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \
|| CONFIG(HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \
|| CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
/*
* Your basic SMP spinlocks, allowing only a single CPU anywhere
*/
@ -27,23 +22,14 @@ typedef struct {
volatile unsigned int lock;
} spinlock_t;
#ifdef __PRE_RAM__
spinlock_t *romstage_console_lock(void);
void initialize_romstage_console_lock(void);
spinlock_t *romstage_nvram_cbfs_lock(void);
void initialize_romstage_nvram_cbfs_lock(void);
spinlock_t *romstage_microcode_cbfs_lock(void);
void initialize_romstage_microcode_cbfs_lock(void);
#endif
#define SPIN_LOCK_UNLOCKED { 1 }
#ifndef __PRE_RAM__
#define STAGE_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE
#if STAGE_HAS_SPINLOCKS
#define DECLARE_SPIN_LOCK(x) \
static spinlock_t x = SPIN_LOCK_UNLOCKED;
#else
#define DECLARE_SPIN_LOCK(x)
#endif
/*
* Simple spin lock operations. There are two variants, one clears IRQ's
@ -93,7 +79,7 @@ static __always_inline void cpu_relax(void)
__asm__ __volatile__("rep;nop" : : : "memory");
}
#else /* !__PRE_RAM__ */
#else
#define DECLARE_SPIN_LOCK(x)
#define barrier() do {} while (0)
@ -103,6 +89,6 @@ static __always_inline void cpu_relax(void)
#define spin_unlock(lock) do {} while (0)
#define cpu_relax() do {} while (0)
#endif /* !__PRE_RAM__ */
#endif
#endif /* ARCH_SMP_SPINLOCK_H */

View File

@ -23,9 +23,7 @@
#include <trace.h>
#include <timer.h>
#if (!defined(__PRE_RAM__) && CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)) || !CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
DECLARE_SPIN_LOCK(console_lock)
#endif
#define TRACK_CONSOLE_TIME (CONFIG(HAVE_MONOTONIC_TIMER) && \
(ENV_RAMSTAGE || !CONFIG(CAR_GLOBAL_MIGRATION)))
@ -95,13 +93,7 @@ int do_vprintk(int msg_level, const char *fmt, va_list args)
return 0;
DISABLE_TRACE;
#ifdef __PRE_RAM__
#if CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
spin_lock(romstage_console_lock());
#endif
#else
spin_lock(&console_lock);
#endif
console_time_run();
@ -114,13 +106,7 @@ int do_vprintk(int msg_level, const char *fmt, va_list args)
console_time_stop();
#ifdef __PRE_RAM__
#if CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
spin_unlock(romstage_console_lock());
#endif
#else
spin_unlock(&console_lock);
#endif
ENABLE_TRACE;
return i;