arch/x86: Remove spinlocks inside CAR
This was only used with amdfam10h-15h, where cache coherency between nodes was supposed to be guaranteed with this code. We could want a cleaner and more generic approach for this, possibly utilising .data sections. Change-Id: I00da5c2b0570c26f2e3bb464274485cc2c08c8f0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34929 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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16
src/Kconfig
16
src/Kconfig
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@ -527,22 +527,6 @@ config RESUME_PATH_SAME_AS_BOOT
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same path as a regular boot. e.g. an x86 system runs from the
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reset vector at 0xfffffff0 on both resume and warm/cold boot.
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config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
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bool
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default n
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config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
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bool
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default n
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help
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This should be enabled on certain plaforms, such as the AMD
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SR565x, that cannot handle concurrent CBFS accesses from
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multiple APs during early startup.
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config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
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bool
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default n
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config NO_MONOTONIC_TIMER
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def_bool n
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@ -14,11 +14,6 @@
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#ifndef ARCH_SMP_SPINLOCK_H
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#define ARCH_SMP_SPINLOCK_H
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#if !defined(__PRE_RAM__) \
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|| CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \
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|| CONFIG(HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \
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|| CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
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/*
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* Your basic SMP spinlocks, allowing only a single CPU anywhere
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*/
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@ -27,23 +22,14 @@ typedef struct {
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volatile unsigned int lock;
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} spinlock_t;
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#ifdef __PRE_RAM__
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spinlock_t *romstage_console_lock(void);
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void initialize_romstage_console_lock(void);
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spinlock_t *romstage_nvram_cbfs_lock(void);
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void initialize_romstage_nvram_cbfs_lock(void);
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spinlock_t *romstage_microcode_cbfs_lock(void);
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void initialize_romstage_microcode_cbfs_lock(void);
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#endif
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#define SPIN_LOCK_UNLOCKED { 1 }
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#ifndef __PRE_RAM__
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#define STAGE_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE
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#if STAGE_HAS_SPINLOCKS
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#define DECLARE_SPIN_LOCK(x) \
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static spinlock_t x = SPIN_LOCK_UNLOCKED;
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#else
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#define DECLARE_SPIN_LOCK(x)
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#endif
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/*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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@ -93,7 +79,7 @@ static __always_inline void cpu_relax(void)
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__asm__ __volatile__("rep;nop" : : : "memory");
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}
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#else /* !__PRE_RAM__ */
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#else
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#define DECLARE_SPIN_LOCK(x)
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#define barrier() do {} while (0)
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@ -103,6 +89,6 @@ static __always_inline void cpu_relax(void)
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#define spin_unlock(lock) do {} while (0)
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#define cpu_relax() do {} while (0)
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#endif /* !__PRE_RAM__ */
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#endif
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#endif /* ARCH_SMP_SPINLOCK_H */
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@ -23,9 +23,7 @@
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#include <trace.h>
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#include <timer.h>
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#if (!defined(__PRE_RAM__) && CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)) || !CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
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DECLARE_SPIN_LOCK(console_lock)
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#endif
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#define TRACK_CONSOLE_TIME (CONFIG(HAVE_MONOTONIC_TIMER) && \
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(ENV_RAMSTAGE || !CONFIG(CAR_GLOBAL_MIGRATION)))
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@ -95,13 +93,7 @@ int do_vprintk(int msg_level, const char *fmt, va_list args)
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return 0;
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DISABLE_TRACE;
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#ifdef __PRE_RAM__
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#if CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
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spin_lock(romstage_console_lock());
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#endif
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#else
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spin_lock(&console_lock);
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#endif
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console_time_run();
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@ -114,13 +106,7 @@ int do_vprintk(int msg_level, const char *fmt, va_list args)
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console_time_stop();
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#ifdef __PRE_RAM__
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#if CONFIG(HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
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spin_unlock(romstage_console_lock());
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#endif
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#else
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spin_unlock(&console_lock);
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#endif
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ENABLE_TRACE;
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return i;
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