mb/google/eve: Use rt5663 driver and set properties
Use the rt5663 driver and provide values for the offsets which are needed for providing manual values to compensate the DC offset for L and R channels between headphone and headset. BUG=b:62712227 TEST=build and boot on eve and ensure rt5663 is functional. Change-Id: I88113616e4b7c79cff840168b7c54ae754dfa75f Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Change-Id: Ica4090636c1ff29f0298114e62c9cc6fe167a425 Original-Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/611606 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Hsinyu Chao <hychao@chromium.org> Reviewed-on: https://review.coreboot.org/22446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_HID
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select DRIVERS_PS2_KEYBOARD
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select DRIVERS_PS2_KEYBOARD
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select DRIVERS_I2C_MAX98927
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select DRIVERS_I2C_MAX98927
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select DRIVERS_I2C_RT5663
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select DRIVERS_SPI_ACPI
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select DRIVERS_SPI_ACPI
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_GOOGLE_CHROMEEC_BOARDID
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@ -289,11 +289,12 @@ chip soc/intel/skylake
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register "name" = ""MAXL""
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register "name" = ""MAXL""
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device i2c 3a on end
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device i2c 3a on end
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end
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end
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chip drivers/i2c/generic
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chip drivers/i2c/rt5663
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register "hid" = ""10EC5663""
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register "name" = ""RT53""
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register "desc" = ""Realtek RT5663""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
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register "dc_offset_l_manual" = "0xffd160"
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register "dc_offset_r_manual" = "0xffd1c0"
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register "dc_offset_l_manual_mic" = "0xff8a10"
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register "dc_offset_r_manual_mic" = "0xff8ab0"
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device i2c 13 on end
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device i2c 13 on end
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end
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end
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chip drivers/i2c/generic
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chip drivers/i2c/generic
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